| OPU: An FPGA-based overlay processor for convolutional neural networks Y Yu, C Wu, T Zhao, K Wang, L He IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (1), 35-47, 2019 | 127 | 2019 |
| Light-OPU: An FPGA-based overlay processor for lightweight convolutional neural networks Y Yu, T Zhao, K Wang, L He Proceedings of the 2020 ACM/SIGDA International Symposium on Field …, 2020 | 105 | 2020 |
| Uni-OPU: An FPGA-Based Uniform Accelerator for Convolutional and Transposed Convolutional Networks Y Yu, T Zhao, M Wang, K Wang, L He IEEE transactions on very large scale integration (VLSI) systems 28 (7 …, 2020 | 49 | 2020 |
| A novel RLE & LZW for bit-stream compression T Li, T Zhao, M Nho, X Zhou 2016 13th IEEE International Conference on Solid-State and Integrated …, 2016 | 7 | 2016 |
| Heterogeneous dual-core overlay processor for light-weight cnns T Zhao, Y Yu, K Wang, L He 2021 IEEE 29th Annual International Symposium on Field-Programmable Custom …, 2021 | 5 | 2021 |
| Token Packing for Transformers with Variable-Length Inputs T Zhao, S Miao, S Lu, J Cao, J Qiu, X Shi, K Wang, L He 2023 33rd International Conference on Field-Programmable Logic and …, 2023 | 1 | 2023 |
| An FPGA-based Multi-Core Overlay Processor for Transformer-based Models S Lu, T Zhao, R Zhang, TJ Lin, C Wu, L He 2024 2nd International Symposium of Electronics Design Automation (ISEDA …, 2024 | | 2024 |
| An FPGA-Based Efficient Streaming Vector Processing Engine for Transformer-Based Models Z He, T Zhao, S Miao, C Wu, L He 2024 2nd International Symposium of Electronics Design Automation (ISEDA …, 2024 | | 2024 |
| Bit stream compression using Self-Adaptive EFDR coding T Zhao, T Li, M Nho, X Zhou 2016 13th IEEE International Conference on Solid-State and Integrated …, 2016 | | 2016 |
| Towards A Reconfigurable Systolic Array with Multi-Level Packing for Transformers T Zhao, S Miao, S Lu, JL Cao, J Qiu, X Shi, K Wang, L He Architecture and System Support for Transformer Models (ASSYST@ ISCA 2023), 0 | | |
