关注
Bimal Meher
Bimal Meher
Associate Professor, Dept. of Computer Science & Engg., Silicon University, Odisha, Bhubaneswar
在 silicon.ac.in 的电子邮件经过验证
标题
引用次数
引用次数
年份
Low-complexity digit-serial and scalable SPB/GPB multipliers over large binary extension fields using (b, 2)-way Karatsuba decomposition
CY Lee, CS Yang, BK Meher, PK Meher, JS Pan
IEEE Transactions on Circuits and Systems I: Regular Papers 61 (11), 3115-3124, 2014
392014
KL-RAP: An Efficient Key-less RFID Authentication Protocol Based on ECDLP for Consumer Warehouse Management System
BK Meher, R Amin, AK Das, MK Khan
IEEE Transactions on Network Science and Engineering 9 (5), 3411 - 3420, 2022
102022
Analysis of systolic penalties and design of efficient digit-level systolic-like multiplier for binary extension fields
BK Meher, PK Meher
Circuits, Systems, and Signal Processing 38, 774-790, 2019
72019
Efficient certificateless anonymous mutual authentication in wbans for smart healthcare
BK Meher, R Amin, M Abdussami, V Sureshkumar, MA Hossain
IEEE Transactions on Intelligent Transportation Systems, 2024
22024
Digit-Size Selection for FPGA Implementation of Generic Digit-Serial Multiplication Over GF (2m)
D Pradhan, BK Meher, PK Meher
2023 1st International Conference on Circuits, Power and Intelligent Systems …, 2023
22023
A location-based multi-factor authentication scheme for mobile devices
BK Meher, R Amin
International Journal of Ad Hoc and Ubiquitous Computing, 2022
22022
An Efficient Look-up Table-based Approach for Multiplication over GF(2 m ) Generated by Trinomials
BK Meher, PK Meher
Circuits, Systems, and Signal Processing 32, 2623-2638, 2013
22013
A New Look-Up Table Approach for High-Speed Finite Field Multiplication
BK Meher, PK Meher
2011 International Symposium on Electronic System Design, 51-55, 2011
22011
Input–output scheduling and control for efficient FPGA realization of digit-serial multiplication over generic binary extension fields
D Pradhan, PK Meher, BK Meher
Circuits, Systems, and Signal Processing, 1-21, 2024
12024
A Study of Suitability and Effectiveness of Various Implementation Options Of Finite Field Arithmetic on Elliptic Curve Crypto System
BK Meher
International Journal of Computer Theory and Engineering 1 (4), 389, 2009
12009
FPGA-Specific Efficient Designs of Digit-Serial Multiplier for Galois Field GF
D Pradhan, PK Meher, BK Meher
Circuits, Systems, and Signal Processing, 1-28, 2024
2024
系统目前无法执行此操作,请稍后再试。
文章 1–11