| Spatio-temporal dynamics in collective frog choruses examined by mathematical modeling and field observations I Aihara, T Mizumoto, T Otsuka, H Awano, K Nagira, HG Okuno, K Aihara Scientific reports 4 (1), 3891, 2014 | 97 | 2014 |
| Compact modeling of statistical BTI under trapping/detrapping JB Velamala, KB Sutaria, H Shimizu, H Awano, T Sato, G Wirth, Y Cao IEEE transactions on electron devices 60 (11), 3645-3654, 2013 | 96 | 2013 |
| RTN in scaled transistors for on-chip random seed generation A Mohanty, KB Sutaria, H Awano, T Sato, Y Cao IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (8 …, 2017 | 35 | 2017 |
| BYNQNet: Bayesian neural network with quadratic activations for sampling-free uncertainty estimation on FPGA H Awano, M Hashimoto 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2020 | 32 | 2020 |
| Ising-PUF: A machine learning attack resistant PUF featuring lattice like arrangement of arbiter-PUFs H Awano, T Sato 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018 | 29 | 2018 |
| PUFNet: A deep neural network based modeling attack for physically unclonable function H Awano, T Iizuka, M Ikeda 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2019 | 25 | 2019 |
| Variability in device degradations: Statistical observation of NBTI for 3996 transistors H Awano, M Hiromoto, T Sato 2014 44th European Solid State Device Research Conference (ESSDERC), 218-221, 2014 | 25 | 2014 |
| Respiratory rate estimation based on WiFi frame capture T Kanda, T Sato, H Awano, S Kondo, K Yamamoto 2022 IEEE 19th Annual Consumer Communications & Networking Conference (CCNC …, 2022 | 21 | 2022 |
| Statistical aging under dynamic voltage scaling: A logarithmic model approach JB Velamala, K Sutaria, H Shimizu, H Awano, T Sato, Y Cao Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 1-4, 2012 | 21 | 2012 |
| BTIarray: A time-overlapping transistor array for efficient statistical characterization of bias temperature instability H Awano, M Hiromoto, T Sato IEEE Transactions on Device and Materials Reliability 14 (3), 833-843, 2014 | 20 | 2014 |
| Logarithmic modeling of BTI under dynamic circuit operation: Static, dynamic and long-term prediction JB Velamala, KB Sutaria, H Shimuzu, H Awano, T Sato, G Wirth, Y Cao 2013 IEEE international reliability physics symposium (IRPS), CM. 3.1-CM. 3.5, 2013 | 17 | 2013 |
| Workload-aware worst path analysis of processor-scale NBTI degradation S Bian, M Shintani, S Morita, H Awano, M Hiromoto, T Sato Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 203-208, 2016 | 16 | 2016 |
| Multi-trap RTN parameter extraction based on Bayesian inference H Awano, H Tsutsui, H Ochi, T Sato International Symposium on Quality Electronic Design (ISQED), 597-602, 2013 | 15 | 2013 |
| Uncertainty-aware haptic shared control with humanoid robots for flexible object manipulation T Hara, T Sato, T Ogata, H Awano IEEE Robotics and Automation Letters, 2023 | 11 | 2023 |
| Implementation of pseudo-linear feedback shift register-based physical unclonable functions on silicon and sufficient Challenge–Response pair acquisition using Built-In Self … Y Ogasahara, Y Hori, T Katashita, T Iizuka, H Awano, M Ikeda, H Koike Integration 71, 144-153, 2020 | 11 | 2020 |
| An encryption-authentication unified A/D conversion scheme for IoT sensor nodes VV Gadde, H Awano, M Ikeda 2018 IEEE Asian Solid-State Circuits Conference (A-SSCC), 123-126, 2018 | 11 | 2018 |
| Visualizing phonotactic behavior of female frogs in darkness I Aihara, PJ Bishop, MEB Ohmer, H Awano, T Mizumoto, HG Okuno, ... Scientific reports 7 (1), 10539, 2017 | 11 | 2017 |
| Distrihd: A memory efficient distributed binary hyperdimensional computing architecture for image classification D Liang, J Shiomi, N Miura, H Awano 2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC), 43-49, 2022 | 10 | 2022 |
| Physically unclonable function using RTN-induced delay fluctuation in ring oscillators M Yoshinaga, H Awano, M Hiromoto, T Sato 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2619-2622, 2016 | 10 | 2016 |
| B2N2: resource efficient Bayesian neural network accelerator using Bernoulli sampler on FPGA H Awano, M Hashimoto Integration 89, 1-8, 2023 | 9 | 2023 |
