| A 0.004mm2250μW ΔΣ TDC with time-difference accumulator and a 0.012mm22.5mW bang-bang digital PLL using PRNG for low-power SoC applications JP Hong, SJ Kim, J Liu, N Xing, TK Jang, J Park, J Kim, T Kim, H Park 2012 IEEE International Solid-State Circuits Conference, 240-242, 2012 | 85 | 2012 |
| 15.5 A 0.6 V 1.17 ps PVT-tolerant and synthesizable time-to-digital converter using stochastic phase interpolation with 16× spatial redundancy in 14nm FinFET technology SJ Kim, W Kim, M Song, J Kim, T Kim, H Park 2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015 | 60 | 2015 |
| Time difference adders, time difference accumulators, sigma-delta time-to-digital converters, digital phase locked loops and temperature sensors S Kim, JH Kim US Patent 8,674,244, 2014 | 54 | 2014 |
| A 0.63 ps, 12b, synchronous cyclic TDC using a time adder for on-chip jitter measurement of a SoC in 28nm CMOS technology SJ Kim, T Kim, H Park 2014 Symposium on VLSI Circuits Digest of Technical Papers, 1-2, 2014 | 26 | 2014 |
| Time-to-digital converter using stochastic phase interpolation S Kim, J Kim, T Kim US Patent 9,490,831, 2016 | 24 | 2016 |
| A 0.009 mm2 2.06 mW 32-to-2000MHz 2nd-order ΔΣ analogous bang-bang digital PLL with feed-forward delay-locked and phase-locked operations in 14nm FinFET technology M Song, T Kim, J Kim, W Kim, SJ Kim, H Park IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, 226-227, 2015 | 23* | 2015 |
| An ultra low power UHF RFID tag front-end for EPCglobal Gen2 with novel clock-free decoder SJ Kim, MC Cho, J Park, K Song, Y Kim, SH Cho 2008 IEEE International Symposium on Circuits and Systems (ISCAS), 660-663, 2008 | 22 | 2008 |
| Time difference adders, time difference accumulators, sigma-delta time-to-digital converters, digital phase locked loops and temperature sensors S Kim, JH Kim US Patent 9,450,594, 2016 | 11 | 2016 |
| Time domain algebraic operation circuits for high performance mixed-mode systems SJ Kim 한국과학기술원, 2010 | 11 | 2010 |
| Current reference circuit and an electronic device including the same S Kim, TI Kim, JH Kim US Patent 9,946,290, 2018 | 10 | 2018 |
| Fast validation of mixed-signal SoCs D Stanley, C Wang, SJ Kim, S Herbst, J Kim, M Horowitz IEEE Open Journal of the Solid-State Circuits Society 1, 184-195, 2021 | 8 | 2021 |
| 20-GS/s 8-bit analog-to-digital converter and 5-GHz phase interpolator for open-source synthesizable high-speed link applications SJ Kim, Z Myers, S Herbst, B Lim, M Horowitz IEEE Solid-State Circuits Letters 3, 518-521, 2020 | 8 | 2020 |
| Open-source synthesizable analog blocks for high-speed link designs: 20-GS/s 5b ENOB analog-to-digital converter and 5-GHz phase interpolator SJ Kim, Z Myers, S Herbst, BC Lim, M Horowitz 2020 IEEE Symposium on VLSI Circuits, 1-2, 2020 | 7 | 2020 |
| Clock generator with stability during PVT variations and on-chip oscillator having the same S Kim, J Kim, T Kim US Patent 9,584,132, 2017 | 7 | 2017 |
| A variation tolerent reconfigurable time difference amplifier SJ Kim, SH Cho 2009 International SoC Design Conference (ISOCC), 301-304, 2009 | 6 | 2009 |
| Phase locked loop having dual bandwidth and method of operating the same S Kim US Patent 9,438,102, 2016 | 4 | 2016 |
| Pixel clock generator, method of operating the same, and apparatuses including the pixel clock generator SJ Kim, T lk Kim, SH Jeon US Patent 9,203,344, 2015 | 1 | 2015 |
| Synthesizable Mixed-signal Building Blocks for Open Source High Speed Serial Links SJ Kim Stanford University, 2021 | | 2021 |
| Temperature controlled oscillator and temperature sensor including the same S Kim, JJ Park US Patent 9,191,015, 2015 | | 2015 |
| A 0.010mm2 9.92psrms low tracking jitter pixel clock generator with a divider initializer and a nearest phase selector in 28nm CMOS technology K Choo, SJ Kim, W Kim, J Kim, T Kim, H Park Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 1-4, 2014 | | 2014 |
