| ANN-and PSO-based synthesis of on-chip spiral inductors for RF ICs SK Mandal, S Sural, A Patra IEEE transactions on computer-aided design of integrated circuits and …, 2007 | 112 | 2007 |
| Reconfigurable antennas and their applications HC Mohanta, A Kouzani, SK Mandal Deakin University, 2019 | 59 | 2019 |
| Low power multiplier architectures using vedic mathematics in 45nm technology for high speed computing BSP Suryasnata Tripathy, L B Omprakash, Sushanta K. Mandal Communication, Information & Computing Technology (ICCICT), 2015 …, 2015 | 34* | 2015 |
| Analysis of daylighting using daylight factor and luminance for different room scenarios BN Mohapatra, MR Kumar, SK Mandal Int. J. Civ. Eng. Technol 9 (10), 949-960, 2018 | 21 | 2018 |
| A comparative analysis of different 8-bit adder topologies at 45 nm technology S Tripathy, LB Omprakash, BS Patro, SK Mandal International journal of engineering research and technology 2 (10), 2013 | 16 | 2013 |
| Analysis of light tubes in interior daylighting system for building BN Mohapatra, MR Kumar, SK Mandal Indonesian Journal of Electrical Engineering and Computer Science 17 (2 …, 2020 | 15 | 2020 |
| A 6–17 GHz linear wide tuning range and low power ring oscillator in 45nm CMOS process for electronic warfare BS Patro, JK Panigrahi, SK Mandal 2012 International Conference on Communication, Information & Computing …, 2012 | 11 | 2012 |
| A wide-band lumped element compact CAD model of Si-based planar spiral inductor for RFIC design SK Mandal, A De, A Patra, S Sural 19th International Conference on VLSI Design held jointly with 5th …, 2006 | 11 | 2006 |
| Positioning of light shelves to enhance daylight illuminance in office rooms BN Mohapatra, MR Kumar, SK Mandal Indonesian Journal of Electrical Engineering and Computer Science 15 (1 …, 2019 | 10 | 2019 |
| Low power, high speed full adder architectures in 45nm technology S Tripathy, LB Omprakash, BS Patro, SK Mandal International conference on VLSI and signal processing, IIT Kharagpur, 2014 | 9 | 2014 |
| FGMOS based low-voltage low-power high output impedance regulated cascode current mirror A Anand, SK Mandal, A Dash, BS Patro International Journal of VLSI Design & Communication Systems 4 (2), 39, 2013 | 9 | 2013 |
| Swarm optimization based on-chip inductor optimization SK Mandal, A Goyel, A Gupta 2009 4th International Conference on Computers and Devices for Communication …, 2009 | 9 | 2009 |
| An efficient power clock generation circuit for complementary pass-transistor adiabatic logic carry-save multiplier P Ranjith, SK Mandal, D Nagchoudhuri 2009 4th International Conference on Computers and Devices for Communication …, 2009 | 8 | 2009 |
| Low Power FGSRAM Cell Using Sleepy and LECTOR Technique KB Ray, SK Mandal, BS Patro Indonesian Journal of Electrical Engineering and Computer Science 4 (2), 333-340, 2016 | 7 | 2016 |
| High speed low power datapath design using multi threshold logic in 45 nm technology for signsl processing application S Tripathy, SK Mandal National Conference on VLSI Signal Processing and Trends in …, 2014 | 7 | 2014 |
| Edge Detection using Sobel Technique SK Mandal, S Tripathi J. Crit. Rev 7, 929-933, 2020 | 6 | 2020 |
| A brief review on fault detection, classification and location on transmission lines using PMUs KB Swain, CC Mahato Int. J. Manage. Technol. Eng. 8, 2608-2618, 2018 | 6 | 2018 |
| A flipped voltage follower based analog multiplier in 90nm CMOS process A Satapathy, SK Maity, SK Mandal 2015 International Conference on Advances in Computer Engineering and …, 2015 | 6 | 2015 |
| A Comprehensive Review on Energy Management Strategies in Hybrid Renewable Energy System MNKSKM Ch Laxmi International Journal of Engineering & Technology (UAE) 7 (2.23), 450-454, 2018 | 5 | 2018 |
| MOM-SVM BS Patro, SK Mandal Indonesian Journal of Electrical Engineering and Computer Science 7 (1), 90-96, 2017 | 5 | 2017 |
