| Reliability performance of advanced organic interposer (CoWoS®-R) packages PY Lin, MC Yew, SS Yeh, SM Chen, CH Lin, CS Chen, CC Hsieh, YJ Lu, ... 2021 IEEE 71st Electronic Components and Technology Conference (ECTC), 723-728, 2021 | 37 | 2021 |
| Three dimensional integrated circuit (3DIC) having a thermally enhanced heat spreader embedded in a substrate PY Lin, WY Lin, S Ter LEU, MC Yew, SS Yeh US Patent 9,721,868, 2017 | 28 | 2017 |
| Semiconductor package and method for forming the same CH Wang, PY Lin, FC Hsu, S Jeng, WY Lin, SS Yeh US Patent 11,011,447, 2021 | 21 | 2021 |
| Warpage modeling and characterization of the viscoelastic relaxation for cured molding process in fan-out packages SS Yeh, PY Lin, KC Lee, JH Wang, WY Lin, MC Yew, PC Lai, ST Leu, ... 2017 IEEE 67th Electronic Components and Technology Conference (ECTC), 841-846, 2017 | 21 | 2017 |
| Semiconductor device package and method of forming semiconductor device package PY Lin, CY Hong, FC Hsu, SM Chen, S Jeng, SS Yeh, KC Lee US Patent 10,276,551, 2019 | 12 | 2019 |
| Chip package with thermal dissipation structure and method for forming the same CH Wang, PY Lin, SS Yeh, KC Lee, S Jeng, ST Leu, CL Huang, HM Yu US Patent 9,870,975, 2018 | 12 | 2018 |
| Optimization of bonding force, sinking value, and potting gap size in COF inner lead bonding process DS Liu, SS Yeh, CT Kao, HC Shen, GS Shen, HH Liu IEEE transactions on advanced packaging 32 (3), 593-601, 2009 | 12 | 2009 |
| Lidded FCCSP warpage evaluation: process modeling and characterization of the effect of viscoelasticity and cured shrinkage for molded underfill SS Yeh, PY Lin, SP Jeng, WY Lin, MC Yew, KC Lee, JH Wang, PC Lai, ... 2016 11th International Microsystems, Packaging, Assembly and Circuits …, 2016 | 10 | 2016 |
| A novel integrated warpage prediction model based on characterization of viscoelasticity in time domain and chemical shrinkage for molded underfill SS Yeh, PY Lin, SP Jeng, WY Lin, MC Yew, KC Lee, ST Leu, KC Liu 2015 10th International Microsystems, Packaging, Assembly and Circuits …, 2015 | 10 | 2015 |
| An integrated warpage prediction model based on chemical shrinkage and viscoelasticity for molded underfill SS Yeh, PY Lin, KC Lee, JH Wang, WY Lin, MC Yew, PC Lai, CK Hsu, ... 2018 IEEE 68th Electronic Components and Technology Conference (ECTC), 249-254, 2018 | 9 | 2018 |
| Fan-out wafer molding process optimization using cure-dependent viscoelastic modeling and characterizations SS Yeh, PY Lin, KC Lee, JH Wang, WY Lin, MC Yew, PC Lai, CK Hsu, ... 2017 12th International Microsystems, Packaging, Assembly and Circuits …, 2017 | 9 | 2017 |
| Method of forming semicondcutor device package PY Lin, CY Hong, FC Hsu, SM Chen, S Jeng, SS Yeh, KC Lee US Patent 10,504,880, 2019 | 7 | 2019 |
| An experimental and numerical investigation into the effects of the chip‐on‐film (COF) processing parameters on the Au‐Sn bonding temperature DS Liu, SS Yeh, CT Kao, PY Huang, CI Tsai, AH Liu, SC Ho Soldering & surface mount technology 22 (4), 31-41, 2010 | 7 | 2010 |
| Chip bonded to a redistribution structure with curved conductive lines CK Hsu, MC Yew, SS Yeh, CC Yang, PY Lin, S Jeng US Patent 11,264,359, 2022 | 6 | 2022 |
| Fracture Modeling and Characterization of Underfill/Polymer Interfacial Adhesion in RDL Interposer Package SS Yeh, PY Lin, CK Hsu, YS Lin, JH Wang, PC Lai, CH Chen, YC Lee, ... 2021 IEEE 71st Electronic Components and Technology Conference (ECTC), 965-970, 2021 | 6 | 2021 |
| Ultra-thin package board level drop impact modeling and validation SS Yeh, PY Lin, MC Yew, WY Lin, KC Lee, CC Yang, JH Wang, PC Lai, ... 2019 IEEE 69th Electronic Components and Technology Conference (ECTC), 1550-1555, 2019 | 5 | 2019 |
| Thermal performance study of next generation fine-pitch chip-on-film (COF) packages—A numerical study DS Liu, SS Yeh, CJ Lu, CW Chang, CW Hung, AH Liu, HH Liu 2011 6th International Microsystems, Packaging, Assembly and Circuits …, 2011 | 5 | 2011 |
| Package structure and method of fabricating the same SS Yeh, CH Wang, YS Lin, PY Lin, S Jeng US Patent App. 17/149,732, 2022 | 4 | 2022 |
| Analysis of Underfill-Polymer Interfacial Adhesive Strength by Combined Experimental and Modeling Approaches SS Yeh, PY Lin, CK Hsu, YS Lin, JH Wang, PC Lai, LL Liao, TY Lee, ... 2020 15th International Microsystems, Packaging, Assembly and Circuits …, 2020 | 4 | 2020 |
| Warpage Modeling and Characterization of the Cure-dependent Chemical Shrinkage and Viscoelastic Relaxation for Cured Molding Process SS Yeh, PY Lin, KC Lee, JH Wang, WY Lin, MC Yew, PC Lai, CK Hsu, ... 2018 13th International Microsystems, Packaging, Assembly and Circuits …, 2018 | 4 | 2018 |
