| A low power phase-change random access memory using a data-comparison write scheme BD Yang, JE Lee, JS Kim, J Cho, SY Lee, BG Yu 2007 IEEE International Symposium on Circuits and Systems (ISCAS), 3014-3017, 2007 | 322 | 2007 |
| High‐performance top‐gated organic field‐effect transistor memory using electrets for monolithic printed flexible NAND flash memory KJ Baeg, D Khim, J Kim, BD Yang, M Kang, SW Jung, IK You, DY Kim, ... Advanced Functional Materials 22 (14), 2915-2926, 2012 | 215 | 2012 |
| A low-power SRAM using hierarchical bit line and local sense amplifiers BD Yang, LS Kim IEEE journal of solid-state circuits 40 (6), 1366-1376, 2005 | 159 | 2005 |
| An 800-MHz low-power direct digital frequency synthesizer with an on-chip D/A converter BD Yang, JH Choi, SH Han, LS Kim, HK Yu IEEE Journal of solid-state circuits 39 (5), 761-774, 2004 | 132 | 2004 |
| A transparent logic circuit for RFID tag in a‐IGZO TFT technology BD Yang, JM Oh, HJ Kang, SH Park, CS Hwang, MK Ryu, JE Pi Etri Journal 35 (4), 610-616, 2013 | 90 | 2013 |
| A 0.25-V rail-to-rail three-stage OTA with an enhanced DC gain KC Woo, BD Yang IEEE Transactions on Circuits and Systems II: Express Briefs 67 (7), 1179-1183, 2019 | 76 | 2019 |
| A low-power CAM using pulsed NAND-NOR match-line and charge-recycling search-line driver BD Yang, LS Kim IEEE Journal of Solid-State Circuits 40 (8), 1736-1744, 2005 | 72 | 2005 |
| A low power content addressable memory using low swing search lines BD Yang, YK Lee, SW Sung, JJ Min, JM Oh, HJ Kang IEEE Transactions on Circuits and Systems I: Regular Papers 58 (12), 2849-2858, 2011 | 71 | 2011 |
| 250-mV supply subthreshold CMOS voltage reference using a low-voltage comparator and a charge-pump circuit BD Yang IEEE Transactions on Circuits and Systems II: Express Briefs 61 (11), 850-854, 2014 | 68 | 2014 |
| An accurate current reference using temperature and process compensation current mirror BD Yang, YK Shin, JS Lee, YK Lee, KC Ryu 2009 IEEE Asian Solid-State Circuits Conference, 241-244, 2009 | 65 | 2009 |
| Flexible complementary logic gates using inkjet-printed polymer field-effect transistors KJ Baeg, D Khim, J Kim, DY Kim, SW Sung, BD Yang, YY Noh IEEE Electron Device Letters 34 (1), 126-128, 2012 | 58 | 2012 |
| Low-power and area-efficient shift register using pulsed latches BD Yang IEEE Transactions on Circuits and Systems I: Regular Papers 62 (6), 1564-1571, 2015 | 56 | 2015 |
| Zinc tin oxide synaptic device for neuromorphic engineering JH Ryu, B Kim, F Hussain, M Ismail, C Mahata, T Oh, M Imran, KK Min, ... IEEE Access 8, 130678-130686, 2020 | 54 | 2020 |
| A low-power ROM using charge recycling and charge sharing techniques BD Yang, LS Kim IEEE Journal of Solid-State Circuits 38 (4), 641-653, 2003 | 54 | 2003 |
| Resistive switching characteristics and mechanism of bilayer HfO2/ZrO2 structure deposited by radio-frequency sputtering for nonvolatile memory M Ismail, Z Batool, K Mahmood, AM Rana, BD Yang, S Kim Results in Physics 18, 103275, 2020 | 52 | 2020 |
| A low-power SRAM using bit-line charge-recycling for read and write operations BD Yang IEEE journal of solid-state circuits 45 (10), 2173-2183, 2010 | 41 | 2010 |
| A low-power charge-recycling ROM architecture BD Yang, LS Kim IEEE transactions on very large scale integration (VLSI) systems 11 (4), 590-600, 2003 | 31 | 2003 |
| A high speed direct digital frequency synthesizer using a low power pipelined parallel accumulator BD Yang, LS Kim, HK Yu 2002 IEEE International Symposium on Circuits and Systems (ISCAS) 5, V-V, 2002 | 26 | 2002 |
| Low power clock generator based on an area-reduced interleaved synchronous mirror delay scheme K Sung, BD Yang, LS Kim 2002 IEEE International Symposium on Circuits and Systems (ISCAS) 3, III-III, 2002 | 20 | 2002 |
| A low-power ROM using single charge-sharing capacitor and hierarchical bit line BD Yang, LS Kim IEEE transactions on very large scale integration (VLSI) systems 14 (4), 313-322, 2006 | 19 | 2006 |
