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Jiwon Yoon
Jiwon Yoon
在 kaist.ac.kr 的电子邮件经过验证
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Adaptive Gramian-Angular-Field Segmentation Integration Based Generative Adversarial Network (AGSI-GAN) for Eye Diagram Estimation of High Bandwidth Memory (HBM) Interposer
J Lee, S Choi, K Son, J Park, H Kim, K Kim, T Shin, B Sim, J Hong, J Yoon, ...
2023 IEEE 32nd Conference on Electrical Performance of Electronic Packaging …, 2023
42023
Pin-opt: Graph Representation Learning for Large-scale Pin Assignment Optimization of Microbumps considering Signal and Power Integrity
J Park, S Choi, K Son, J Lee, T Shin, K Kim, B Sim, S Kim, J Kim, J Yoon, ...
IEEE Transactions on Components, Packaging and Manufacturing Technology, 2024
32024
Signal Integrity Analysis of High-speed PCIe Channel with Board-to-Board Interconnect for High-Performance Server
S Kim, K Son, J Yoon, T Shin, K Kim, B Sim, J Park, S Cho, J Kim, H Kim, ...
2023 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS), 1-3, 2023
22023
Power Supply Induced Jitter (PSIJ) Modeling, Analysis, and Optimization of High Bandwidth Memory (HBM) I/O Interface
H Park, T Shin, S Kim, K Son, K Kim, B Sim, H Kang, S Choi, J Yoon, ...
2023 IEEE Symposium on Electromagnetic Compatibility & Signal/Power …, 2023
22023
The Significance of Thermal-Aware Universal Chiplet Interconnect Express (UCIe) Interface Design in 2.5 D/3D ICs
K Son, K Kim, S Choi, J Yoon, J Kim, J Hong, H Kim, J Lee, J Kim
2023 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS), 1-3, 2023
12023
Design and Analysis of Redistribution Layer Interposer Channel Considering Signal Integrity for High Bandwidth Memory Module
J Yoon, H Park, H Kim, B Sim, J Hong, S Kim, K Son, K Kim, Y Kim, S Park, ...
2023 IEEE 32nd Conference on Electrical Performance of Electronic Packaging …, 2023
12023
Fast and Accurate Computation of Wireless Power Transfer System Optimal Design Using Particle Swarm Optimization Method
B Sim, T Shin, H Park, K Son, K Kim, D Lho, S Kim, J Yoon, H Kim, J Lee, ...
IEEE Transactions on Electromagnetic Compatibility, 2023
12023
SI/PI Co-Design of 12.8 Gbps HBM I/O Interface using Bayesian Optimization for PSIJ Reduction
T Shin, H Park, D Lho, K Kim, B Sim, S Kim, J Kim, S Choi, J Yoon, J Song, ...
2023 IEEE Symposium on Electromagnetic Compatibility & Signal/Power …, 2023
12023
Design and Analysis of Hierarchical Power Distribution Network (PDN) for Full Wafer Scale Chip (FWSC) Module
H Kim, H Kim, J Park, K Son, H Park, T Shin, K Kim, J Yoon, J Lee, J Hong, ...
2022 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS), 1-3, 2022
12022
Deep Reinforcement Learning-based Channel-flexible Equalization Scheme: An Application to High Bandwidth Memory
S Choi, J Kim, H Park, H Kim, J Park, K Son, SG Kim, K Kim, D Lho, ...
DesignCon 2022, 2022
12022
Imitation Learning with Bayesian Exploration (IL-BE) for Signal Integrity (SI) of PAM-4 based High-speed Serial Link: PCIe 6.0
J Kim, J Kim, H Park, J Yoon, S Choi, J Park, HY Kim, K Son, SG Kim, ...
DesignCon 2022, 2022
12022
Design and Analysis of Extended Scale Cache (ESC) Stacked-GPU-HBM Module Architecture Considering Power Integrity (PI)
H Park, S Choi, H Kim, T Shin, K Son, J Yoon, J Lee, H Suh, T Kim, J Ahn, ...
2024 IEEE 33rd Conference on Electrical Performance of Electronic Packaging …, 2024
2024
Explainable Reinforcement Learning (XRL)-Based Decap Placement Optimization for High Bandwidth Memory (HBM)
K Kim, H Park, K Son, S Choi, T Shin, J Lee, J Yoon, H An, H Kim, W Choi, ...
2024 IEEE 33rd Conference on Electrical Performance of Electronic Packaging …, 2024
2024
Design and Analysis of Ultra High Bandwidth (UHB) Interconnection-based GPU-Ring for the AI Superchip Module
J Ahn, S Choi, T Shin, J Lee, J Yoon, K Kim, K Son, H Suh, T Kim, H Park, ...
2024 IEEE 33rd Conference on Electrical Performance of Electronic Packaging …, 2024
2024
Design and Analysis of L3 Cache Embedded-GPU-High Bandwidth Memory Architecture with Reduced Energy and Latency for AI Computing
H Suh, J Yoon, K Son, S Choi, K Kim, J Lee, T Shin, H An, T Kim, J Ahn, ...
2024 IEEE 33rd Conference on Electrical Performance of Electronic Packaging …, 2024
2024
High-speed Interconnect Design of Silicon Interposer based Heterogeneous Integration for AI Computing
K Son, S Choi, K Kim, J Yoon, J Lee, H Suh, H An, J Kim
2024 IEEE 33rd Conference on Electrical Performance of Electronic Packaging …, 2024
2024
Eye-Diagram Edge Estimation (EEE) Network for Through Silicon via Design in Next-Generation High Bandwidth Memory
H An, J Lee, K Son, S Choi, T Shin, K Kim, J Yoon, T Kim, J Ahn, H Park, ...
2024 IEEE 33rd Conference on Electrical Performance of Electronic Packaging …, 2024
2024
The Energy-Efficient 10-Chiplet AI Hyperscale NPU on Large-Scale Advanced Package
J Yoon, Y Kwon, H Kim, J Lee, J Kim, S Kim, H Jang, K Ahn, J Kim, ...
2024 IEEE 74th Electronic Components and Technology Conference (ECTC), 1687-1693, 2024
2024
Multi-Stripline Redistribution Layer Interposer Channel Design for High Bandwidth Memory Module Considering Via Interconnect
J Yoon, H Kim, B Sim, H Park, Y Kim, S Park, Y Kwon, J Kim
2023 20th International SoC Design Conference (ISOCC), 247-248, 2023
2023
Signal Integrity Design and Analysis of Redistribution Layer Interposer Channel with Diagonal Meshed Ground in Memory Interface of High Bandwidth Memory
J Hong, J Yoon, H Kim, K Son, S Choi, J Lee, K Kim, J Park, S Kim, B Sim, ...
2023 IEEE 32nd Conference on Electrical Performance of Electronic Packaging …, 2023
2023
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