System level analysis of fast, per-core DVFS using on-chip switching regulators W Kim, MS Gupta, GY Wei, D Brooks 2008 IEEE 14th International Symposium on High Performance Computer …, 2008 | 1019 | 2008 |
Minerva: Enabling low-power, highly-accurate deep neural network accelerators B Reagen, P Whatmough, R Adolf, S Rama, H Lee, SK Lee, ... ACM SIGARCH Computer Architecture News 44 (3), 267-278, 2016 | 735 | 2016 |
Profiling a warehouse-scale computer S Kanev, JP Darago, K Hazelwood, P Ranganathan, T Moseley, GY Wei, ... Proceedings of the 42nd annual international symposium on computer …, 2015 | 548 | 2015 |
Aladdin: A pre-rtl, power-performance accelerator simulator enabling large design space exploration of customized architectures YS Shao, B Reagen, GY Wei, D Brooks ACM SIGARCH Computer Architecture News 42 (3), 97-108, 2014 | 389 | 2014 |
Thread motion: fine-grained power management for multi-core systems KK Rangan, GY Wei, D Brooks ACM SIGARCH Computer Architecture News 37 (3), 302-313, 2009 | 357 | 2009 |
Ares: A framework for quantifying the resilience of deep neural networks B Reagen, U Gupta, L Pentecost, P Whatmough, SK Lee, N Mulholland, ... Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018 | 338 | 2018 |
Benchmarking TPU, GPU, and CPU platforms for deep learning YE Wang, GY Wei, D Brooks arXiv preprint arXiv:1907.10701, 2019 | 319 | 2019 |
MachSuite: Benchmarks for accelerator design and customized architectures B Reagen, R Adolf, YS Shao, GY Wei, D Brooks 2014 IEEE International Symposium on Workload Characterization (IISWC), 110-119, 2014 | 319 | 2014 |
A fully-integrated 3-level DC-DC converter for nanosecond-scale DVFS W Kim, D Brooks, GY Wei IEEE Journal of Solid-State Circuits 47 (1), 206-219, 2011 | 313 | 2011 |
Mlperf training benchmark P Mattson, C Cheng, G Diamos, C Coleman, P Micikevicius, D Patterson, ... Proceedings of Machine Learning and Systems 2, 336-349, 2020 | 309 | 2020 |
Driving high voltage piezoelectric actuators in microrobotic applications M Karpelson, GY Wei, RJ Wood Sensors and actuators A: Physical 176, 78-89, 2012 | 267 | 2012 |
Understanding voltage variations in chip multiprocessors using a distributed power-delivery network MS Gupta, JL Oatley, R Joseph, GY Wei, DM Brooks 2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007 | 262 | 2007 |
A portable, low-power, wireless two-lead EKG system TRF Fulford-Jones, GY Wei, M Welsh The 26th Annual International Conference of the IEEE Engineering in Medicine …, 2004 | 248 | 2004 |
Chasing carbon: The elusive environmental footprint of computing U Gupta, YG Kim, S Lee, J Tse, HHS Lee, GY Wei, D Brooks, CJ Wu 2021 IEEE International Symposium on High-Performance Computer Architecture …, 2021 | 246 | 2021 |
A fully digital, energy-efficient, adaptive power-supply regulator GY Wei, M Horowitz IEEE Journal of solid-state Circuits 34 (4), 520-528, 1999 | 245 | 1999 |
An ultra low power system architecture for sensor network applications M Hempstead, N Tripathi, P Mauro, GY Wei, D Brooks 32nd International Symposium on Computer Architecture (ISCA'05), 208-219, 2005 | 234 | 2005 |
A review of actuation and power electronics options for flapping-wing robotic insects M Karpelson, GY Wei, RJ Wood 2008 IEEE international conference on robotics and automation, 779-786, 2008 | 223 | 2008 |
Adaptive bandwidth DLLs and PLLs using regulated supply CMOS buffers S Sidiropoulos, D Liu, J Kim, G Wei, M Horowitz 2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No …, 2000 | 220 | 2000 |
14.3 A 28nm SoC with a 1.2 GHz 568nJ/prediction sparse deep-neural-network engine with> 0.1 timing error rate tolerance for IoT applications PN Whatmough, SK Lee, H Lee, S Rama, D Brooks, GY Wei 2017 IEEE International Solid-State Circuits Conference (ISSCC), 242-243, 2017 | 201 | 2017 |
Co-designing accelerators and SoC interfaces using gem5-Aladdin YS Shao, SL Xi, V Srinivasan, GY Wei, D Brooks 2016 49th Annual IEEE/ACM International Symposium on Microarchitecture …, 2016 | 201 | 2016 |