Power efficient and high performance VLSI architecture for AES algorithm K Kalaiselvi, H Mangalam Journal of Electrical Systems and Information Technology 2 (2), 178-183, 2015 | 29 | 2015 |
Design and implementation of power and area optimized AES architecture on FPGA for IoT application P Rajasekar, H Mangalam Circuit World 47 (2), 153-163, 2020 | 20 | 2020 |
A delay efficient vedic multiplier E Prabhu, H Mangalam, PR Gokul Proceedings of the National Academy of Sciences, India Section A: Physical …, 2019 | 19 | 2019 |
Design of area and power efficient Radix-4 DIT FFT butterfly unit using floating point fused arithmetic E Prabhu, H Mangalam, S Karthick Journal of Central South University 23, 1669-1681, 2016 | 16 | 2016 |
Gate and subthreshold leakage reduced SRAM cells H Mangalam, K Gunavathi DSP Journal 6 (1), 2006 | 16 | 2006 |
RADAR based vehicle collision avoidance system used in four wheeler automobile segments R Sivakumar, H Mangalam International Journal of Scientific & Engineering Research 5 (1), 763-770, 2014 | 14 | 2014 |
Third generation memetic optimization technique for energy efficient routing stability and load balancing in MANET PC Sekar, H Mangalam Cluster Computing 22 (Suppl 5), 11941-11948, 2019 | 12 | 2019 |
Efficient FPGA implementation of AES 128 bit for IEEE 802.16 e mobile WiMax standards P Rajasekar, H Mangalam Circuits and Systems 7 (4), 371-380, 2016 | 11 | 2016 |
Design of a CMOS PFD-CP module for a PLL NK Anushkannan, H Mangalam Sadhana 40, 1105-1116, 2015 | 10 | 2015 |
Performance comparison of multipliers based on Square and Multiply and montgomery algorithms PR Gokul, E Prabhu, H Mangalam 2014 International Conference on Green Computing Communication and …, 2014 | 10 | 2014 |
Design and implementation of low power multistage AES S box P Rajasekar, H Mangalam International Journal of Applied engineering Research 10, 40535-40540, 2015 | 9 | 2015 |
Design of low power S-box in Architecture Level using GF M Shanthini, P Rajasekar, H Mangalam International journal of engineering research and general science (IJERG …, 2014 | 9 | 2014 |
Design of low power digital fir filter based on bypassing multiplier E Prabhu, H Mangalam, K Saranya International Journal of Computer Applications 70 (9), 2013 | 9 | 2013 |
Design, simulation, and optimization of optical full-adder based on Mach–Zehnder interference NK Anushkannan, H Mangalam, CR Rathish, A Kumar Optics Communications 528, 129056, 2023 | 8 | 2023 |
Ensemble hill climbing optimization in adaptive cruise control for safe automated vehicle transportation R Sivakumar, H Mangalam The Journal of Supercomputing 76, 5780-5800, 2020 | 8 | 2020 |
Area efficient high speed and low power MAC unit K Kalaiselvi, H Mangalam International Journal of Computer Applications 67 (23), 2013 | 8 | 2013 |
Wavelet-based image compression of quasi encrypted grayscale images SS Kumar, H Mangalam International Journal of Computer Applications 45 (12), 2012 | 8 | 2012 |
FPGA architecture for text extraction from images O Vignesh, H Mangalam, S Gayathri Cluster Computing 22 (Suppl 5), 12137-12146, 2019 | 7 | 2019 |
A Modified PFD Based PLL with Frequency Dividers in 0.18-µm CMOS Technology NK Anushkannan, H Mangalam Circuits and Systems 7 (13), 4169-4185, 2016 | 7 | 2016 |
Design of low power optimized MixColumn/inverse MixColumn architecture for AES P Rajasekar, H Mangalam International Journal of Applied Engineering Research 11, 922-926, 2016 | 7 | 2016 |