| Resource sharing and pipelining in coarse-grained reconfigurable architecture for domain-specific optimization Y Kim, M Kiemb, C Park, J Jung, K Choi Design, Automation and Test in Europe, 12-17, 2005 | 130 | 2005 |
| A spatial mapping algorithm for heterogeneous coarse-grained reconfigurable architectures M Ahn, JW Yoon, Y Paek, Y Kim, M Kiemb, K Choi Proceedings of the Design Automation & Test in Europe Conference 1, 6 pp., 2006 | 77 | 2006 |
| Power-conscious configuration cache structure and code mapping for coarse-grained reconfigurable architecture Y Kim, I Park, K Choi, Y Paek Proceedings of the 2006 international symposium on Low power electronics and …, 2006 | 71 | 2006 |
| Design space exploration for efficient resource utilization in coarse-grained reconfigurable architecture Y Kim, RN Mahapatra, K Choi IEEE Transactions on Very Large Scale Integration (VLSI) Systems 18 (10 …, 2009 | 48 | 2009 |
| Dynamic context compression for low-power coarse-grained reconfigurable architecture Y Kim, RN Mahapatra IEEE Transactions on Very Large Scale Integration (VLSI) Systems 18 (1), 15-28, 2009 | 48 | 2009 |
| Low power reconfiguration technique for coarse-grained reconfigurable architecture Y Kim, RN Mahapatra, I Park, K Choi IEEE transactions on very large scale integration (VLSI) systems 17 (5), 593-603, 2009 | 42 | 2009 |
| Design and evaluation of a coarse-grained reconfigurable architecture Y Kim, C Park, S Kang, H Song, J Jung, K Choi Proc. of Int. SoC Design Conf, 227-230, 2004 | 28 | 2004 |
| Dynamic context management for low power coarse-grained reconfigurable architecture Y Kim, RN Mahapatra Proceedings of the 19th ACM Great Lakes symposium on VLSI, 33-38, 2009 | 16 | 2009 |
| A new array fabric for coarse-grained reconfigurable architecture Y Kim, RN Mahapatra 2008 11th EUROMICRO Conference on Digital System Design Architectures …, 2008 | 16 | 2008 |
| Design of low-power coarse-grained reconfigurable architectures Y Kim, RN Mahapatra CRC Press, 2010 | 13 | 2010 |
| Hierarchical reconfigurable computing arrays for efficient CGRA-based embedded systems Y Kim, RN Mahapatra Proceedings of the 46th Annual Design Automation Conference, 826-831, 2009 | 13 | 2009 |
| Efficient design space exploration for domain-specific optimization of coarse-grained reconfigurable architecture Y Kim, M Kiemb, K Choi SoC Design Conference, 12-17, 2005 | 11 | 2005 |
| Reconfigurable multi-array architecture for low-power and high-speed embedded systems YJ Kim JSTS: Journal of Semiconductor Technology and Science 11 (3), 207-220, 2011 | 8 | 2011 |
| Reconfigurable hardware architecture for faster descriptor extraction in SURF Y Kim, H Jung Electronics Letters 54 (4), 210-212, 2018 | 7 | 2018 |
| Reusable context pipelining for low power coarse-grained reconfigurable architecture Y Kim, RN Mahapatra 2008 IEEE International Symposium on Parallel and Distributed Processing, 1-8, 2008 | 7 | 2008 |
| Temporal mapping for loop pipelining on a MIMD-style coarse-grained reconfigurable architecture J Yoon, M Ahn, Y Paek, Y Kim, K Choi 대한전자공학회 ISOCC, 319-322, 2006 | 6 | 2006 |
| Inter-coarse-grained reconfigurable architecture reconfiguration technique for efficient pipelining of kernel-stream on coarse-grained reconfigurable architecture-based multi … Y Kim, H Joo, S Yoon IET Circuits, Devices & Systems 10 (4), 251-265, 2016 | 5 | 2016 |
| POWER-EFFICIENT CONFIGURATION CACHE STRUCTURE FOR COARSE-GRAINED RECONFIGURABLE ARCHITECTURE Y Kim Journal of Circuits, Systems and Computers 22 (03), 1350001, 2013 | 5 | 2013 |
| Dynamically compressible context architecture for low power coarse-grained reconfigurable array Y Kim, RN Mahapatra 2007 25th International Conference on Computer Design, 395-400, 2007 | 5 | 2007 |
| Domain-specific optimization of reconfigurable array architecture C Park, Y Kim, K Choi Proc. US-Korea Conference, 2005 | 4 | 2005 |
Kiyoung ChoiSeoul National University, Department of Electrical and Computer Engineering在 snu.ac.kr 的电子邮件经过验证
