| On how to accelerate iterative stencil loops: a scalable streaming-based approach R Cattaneo, G Natale, C Sicignano, D Sciuto, MD Santambrogio ACM Transactions on Architecture and Code Optimization (TACO) 12 (4), 1-26, 2015 | 46 | 2015 |
| A polyhedral model-based framework for dataflow implementation on FPGA devices of iterative stencil loops G Natale, G Stramondo, P Bressana, R Cattaneo, D Sciuto, ... 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2016 | 42 | 2016 |
| A multiobjective reconfiguration-aware scheduler for FPGA-based heterogeneous architectures EA Deiana, M Rabozzi, R Cattaneo, MD Santambrogio 2015 International Conference on ReConFigurable Computing and FPGAs …, 2015 | 30 | 2015 |
| ThermOS: System support for dynamic thermal management of chip multi-processors F Sironi, M Maggio, R Cattaneo, GF Del Nero, D Sciuto, ... Proceedings of the 22nd International Conference on Parallel Architectures …, 2013 | 30 | 2013 |
| Para-sched: A reconfiguration-aware scheduler for reconfigurable architectures R Cattaneo, R Bellini, G Durelli, C Pilato, MD Santambrogio, D Sciuto 2014 IEEE International Parallel & Distributed Processing Symposium …, 2014 | 21 | 2014 |
| The autonomic operating system research project: achievements and future directions DB Bartolini, R Cattaneo, GC Durelli, M Maggio, MD Santambrogio, ... Proceedings of the 50th Annual Design Automation Conference, 1-10, 2013 | 21 | 2013 |
| A framework for thermal and performance management DB Bartolini, F Sironi, M Maggio, R Cattaneo, D Sciuto, MD Santambrogio 2012 Workshop on Managing Systems Automatically and Dynamically (MAD 12), 2012 | 14 | 2012 |
| Runtime adaptation on dataflow HPC platforms R Cattaneo, C Pilato, M Mastinu, O Kadlcek, O Pell, MD Santambrogio 2013 NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2013), 84-91, 2013 | 12 | 2013 |
| Smash: A heuristic methodology for designing partially reconfigurable mpsocs R Cattaneo, C Pilato, GC Durelli, MD Santambrogio, D Sciuto 2013 International Symposium on Rapid System Prototyping (RSP), 102-108, 2013 | 7 | 2013 |
| An Enhanced Relocation Manager to Speedup Core Allocation in FPGA-based Reconfigurable Systems MD Santambrogio, F Cancare, R Cattaneo, S Bhandariy, D Sciuto 2012 IEEE 26th International Parallel and Distributed Processing Symposium …, 2012 | 6 | 2012 |
| Thermal-aware floorplanning for partially-reconfigurable fpga-based systems D Pagano, M Vuka, M Rabozzi, R Cattaneo, D Sciuto, MD Santambrogio 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 920-923, 2015 | 5 | 2015 |
| A framework for effective exploitation of partial reconfiguration in dataflow computing R Cattaneo, X Niu, C Pilato, T Becker, W Luk, MD Santambrogio 2013 8th International Workshop on Reconfigurable and Communication-Centric …, 2013 | 5 | 2013 |
| A2b: An integrated framework for designing heterogeneous and reconfigurable systems C Pilato, R Cattaneo, G Durelli, AA Nacci, MD Santambrogio, D Sciuto 2013 NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2013), 198-205, 2013 | 4 | 2013 |
| Acos: an autonomic management layer enhancing commodity operating systems DB Bartolini, M Carminati, R Cattaneo, J Panerati, F Sironi, D Sciuto In DAC Workshop on Computing in Heterogeneous, Autonomous,’N’Goal-oriented …, 2012 | 4 | 2012 |
| Relocation-aware floorplanning for partially-reconfigurable FPGA-based systems M Rabozzi, R Cattaneo, T Becker, W Luk, MD Santambrogio 2015 IEEE International Parallel and Distributed Processing Symposium …, 2015 | 3 | 2015 |
| Adaptive Raytracing Implementation Using Partial Dynamic Reconfiguration G Durelli, F Spada, R Cattaneo, C Pilato, D Pau, MD Santambrogio 2014 IEEE International Parallel & Distributed Processing Symposium …, 2014 | 3 | 2014 |
| FPGA-based design using the FASTER toolchain: the case of STM Spear development board F Spada, A Scolari, GC Durelli, R Cattaneo, MD Santambrogio, D Sciuto, ... 2014 IEEE International Symposium on Parallel and Distributed Processing …, 2014 | 2 | 2014 |
| On how to efficiently accelerate brain network analysis on fpga-based computing system G Gnemmi, M Crippa, G Durelli, R Cattaneo, G Pallotta, MD Santambrogio 2015 International Conference on ReConFigurable Computing and FPGAs …, 2015 | 1 | 2015 |
| Explicitly isolating data and computation in high level synthesis: the role of polyhedral framework R Cattaneo, G Pallotta, D Sciuto, MD Santambrogio 2015 International Conference on ReConFigurable Computing and FPGAs …, 2015 | 1 | 2015 |
| Power-awareness and smart-resource management in embedded computing systems MD Santambrogio, JL Ayala, S Campanoni, R Cattaneo, GC Durelli, ... 2015 International Conference on Hardware/Software Codesign and System …, 2015 | 1 | 2015 |
Marco Domenico SantambrogioAssociate professor, Politecnico di Milano在 polimi.it 的电子邮件经过验证
