| Tilespmv: A Tiled Algorithm for Sparse Matrix-Vector Multiplication on GPUs Y Niu, Z Lu, M Dong, Z Jin, W Liu, G Tan 2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS …, 2021 | 42 | 2021 |
| TileSpGEMM:A Tiled Algorithm for Parallel Sparse General Matrix-Matrix Multiplication on GPUs Y Niu, Z Lu, H Ji, S Song, Z Jin, W Liu 27th ACM SIGPLAN Annual Symposium on Principles and Practical of Parallel …, 2022 | 38 | 2022 |
| SFLU: Synchronization-Free Sparse LU Factorization for Fast Circuit Simulation on GPUs J Zhao, Y Wen, Y Luo, Z Jin, W Liu, Z Zhou 2021 58th ACM/IEEE Design Automation Conference (DAC), 37-42, 2021 | 16 | 2021 |
| A PTA Method Using Numerical Integration Algorithms with Artificial Damping for Solving Nonlinear DC Circuits X Wu, Z Jin, D Niu, Y Inoue Nonlinear Theory and Its Applications, IEICE 5 (4), 512-522, 2014 | 15 | 2014 |
| Effective Implementation and Embedding Algorithms of CEPTA Method for Finding DC Operating Points Z Jin, X Wu, D Niu, Y Inoue IEICE Transactions on Fundamentals of Electronics, Communications and …, 2013 | 12 | 2013 |
| Application of Deep Learning in Back-End Simulation: Challenges and Opportunities Y Chen, H Pei, X Dong, Z Jin, C Zhuo 27th Aisa and South Pacific Design Automation Conference (ASP-DAC'22), 2022 | 11 | 2022 |
| Accelerating Sparse LU Factorization with Density-Aware Adaptive Matrix Multiplication for Circuit Simulation T Wang, W Li, H Pei, Y Sun, Z Jin, W Liu 60th ACM/IEEE Design Automation Conference (DAC '23), 2023 | 9 | 2023 |
| Accelerating Nonlinear DC Circuit Simulation with Reinforcement Learning Z Jin, H Pei, Y Dong, X Jin, X Wu, WW Xing, D Niu 59th Design Automation Conference (DAC '22), 2022 | 9 | 2022 |
| An Adaptive Time-Step Control Method in Damped Pseudo-Transient Analysis for Solving Nonlinear DC Circuit Equations X Wu, Z Jin, D Niu, Y Inoue IEICE Transactions on Fundamentals of Electronics, Communications and …, 2017 | 8 | 2017 |
| An Effective and Globally Convergent Newton Fixed-Point Homotopy Method for MOS Transistor Circuits D Niu, X Wu, Z Jin, Y Inoue IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and …, 2013 | 8 | 2013 |
| Heterogeneous Static Timing Analysis with Advanced Delay Calculator Z Guo, TW Huang, Z Jin, C Zhuo, Y Lin, R Wang, R Huang 21st IEEE/ACM Design, Automation, and Test in Europe (DATE '24), 2024 | 6 | 2024 |
| Segmented Merge: A New Primitive for Parallel Sparse Matrix Computations H Ji, S Lu, K Hou, H Wang, Z Jin, W Liu, B Vinter International Journal of Parallel Programming 49, 732-744, 2021 | 6 | 2021 |
| An Adaptive Dynamic-Element PTA Method for Solving Nonlinear DC Operating Point of Transistor Circuits Z JIN, M LIU, X WU 2018 IEEE 61st International Midwest Symposium on Circuits and Systems …, 2018 | 6 | 2018 |
| Effective Ramping Algorithm and Restart Algorithm in the SPICE3 Implementation for DPTA Method Z Jin, X Wu, D Niu, X Guan, Y Inoue Nonlinear Theory and Its Applications, IEICE 6 (4), 499-511, 2015 | 6 | 2015 |
| PanguLU: A Scalable Regular Two-Dimensional Block-Cyclic Sparse Direct Solver on Distributed Heterogeneous Systems X Fu, B Zhang, T Wang, W Li, Y Lu, E Yi, J Zhao, X Geng, F Li, J Zhang, ... International Conference for High Performance Computing, Networking, Storage …, 2023 | 5 | 2023 |
| PALBBD: A Parallel Arclength Method Using Bordered Block Diagonal Form for DC Analysis Z Jin, T Feng, Y Duan, X Wu, M Cheng, Z Zhou, W Liu Proceedings of the 2021 on Great Lakes Symposium on VLSI, 327-332, 2021 | 5 | 2021 |
| A Globally Convergent and Highly Efficient Homotopy Method for MOS Transistor Circuits D Niu, Z Jin, X Wu, Y Inoue 2012 7th International Conference on Computing and Convergence Technology …, 2012 | 5 | 2012 |
| OSSP-PTA: An Online Stochastic Stepping Policy for PTA on Reinforcement Learning D Niu, Y Dong, Z Jin, C Zhang, Q Li, C Sun IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023 | 3 | 2023 |
| Adaptive Stepping PTA for DC Analysis Based on Reinforcement Learning Y Dong, D Niu, Z Jin, C Zhang, Q Li, C Sun IEEE Transactions on Circuits and Systems II: Express Briefs 70 (1), 266-270, 2023 | 3 | 2023 |
| Boa-pta, A Bayesian Optimization Accelerated Error-Free SPICE Solver WW Xing, X Jin, Y Liu, D Niu, W Zhao, Z Jin arXiv preprint arXiv:2108.00257, 2021 | 3 | 2021 |
Yuyao NiuBarcelona Supercomputing Center在 bsc.es 的电子邮件经过验证
