| DUSTER: DUal Source Write TERmination Method for STT-RAM Memories SS Faraji, J Talafy, AM Hajisadeghi, HR Zarandi 2018 21st Euromicro Conference on Digital System Design (DSD), 182-189, 2018 | 8 | 2018 |
| DYSCO: DYnamic Stepper Current InjectOr to improve write performance in STT-RAM memories S Seyedfaraji, AM Hajisadeghi, J Talafy, HR Zarandi Microprocessors and Microsystems 73, 102963, 2020 | 6 | 2020 |
| EXTENT: Enabling Approximation-Oriented Energy Efficient STT-RAM Write Circuit S Seyedfaraji, JT Daryani, MMS Aly, S Rehman IEEE Access 10, 82144-82155, 2022 | 4 | 2022 |
| TAMPER: Thermal Assistant Method to Improve Write PERformance in STT-RAM Memories SS Faraji, AM Hajisadeghi, H Zarandi 2019 27th Iranian Conference on Electrical Engineering (ICEE), 2039-2044, 2019 | 4 | 2019 |
| AID: Accuracy Improvement of Analog Discharge-Based in-SRAM Multiplication Accelerator S Seyedfaraji, B Mesgari, S Rehman 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 873-878, 2022 | 3 | 2022 |
| HOPE: Holistic STT-RAM Architecture Exploration Framework for Future Cross-Platform Analysis S Seyedfaraji, M Bichl, A Aftab, S Rehman IEEE Access, 2024 | | 2024 |
| SMART: Investigating the Impact of Threshold Voltage Suppression in an In-SRAM Multiplication/Accumulation Accelerator for Accuracy Improvement in 65 nm CMOS Technology S Seyedfaraji, B Mesgari, S Rehman 2022 25th Euromicro Conference on Digital System Design (DSD), 821-826, 2022 | | 2022 |
Hamid R. ZarandiAssociate Professor, Department of Computer Engineering, Amirkabir University of Technology在 aut.ac.ir 的电子邮件经过验证
