The adaptive bubble router V Puente, C Izu, R Beivide, JA Gregorio, F Vallejo, JM Prellezo Journal of Parallel and Distributed Computing 61 (9), 1180-1208, 2001 | 288* | 2001 |
SICOSYS: an integrated framework for studying interconnection network performance in multiprocessor systems V Puente, JA Gregorio, R Beivide Proceedings 10th Euromicro Workshop on Parallel, Distributed and Network …, 2002 | 149 | 2002 |
Immunet: A cheap and robust fault-tolerant packet routing mechanism V Puente, JA Gregorio, F Vallejo, R Beivide 31st International Symposium on Computer Architecture (ISCA 2004) 32 (2 …, 2004 | 130 | 2004 |
Rotary router: an efficient architecture for CMP interconnection networks P Abad, V Puente, JA Gregorio, P Prieto 34th International Symposium on Computer Architecture (ISCA 2007) 35 (2 …, 2007 | 123 | 2007 |
Topaz: An open-source interconnection network simulator for chip multiprocessors and supercomputers P Abad, P Prieto, LG Menezo, V Puente, JÁ Gregorio 2012 IEEE/ACM Sixth International Symposium on Networks-on-Chip, 99-106, 2012 | 114 | 2012 |
MRR: Enabling fully adaptive multicast routing for CMP interconnection networks P Abad, V Puente, JA Gregorio 2009 IEEE 15th International Symposium on High Performance Computer …, 2009 | 77 | 2009 |
ESP-NUCA: A low-cost adaptive non-uniform cache architecture J Merino, V Puente, JA Gregorio HPCA-16 2010 The Sixteenth International Symposium on High-Performance …, 2010 | 71 | 2010 |
Sp-nuca: a cost effective dynamic non-uniform cache architecture J Merino, V Puente, P Prieto, JÁ Gregorio ACM SIGARCH Computer Architecture News 36 (2), 64-71, 2008 | 50 | 2008 |
3D stacking of high-performance processors P Emma, A Buyuktosunoglu, M Healy, K Kailas, V Puente, R Yu, ... 2014 IEEE 20th International Symposium on High Performance Computer …, 2014 | 34 | 2014 |
Improving parallel system performance by changing the arrangement of the network links V Puente, C Izu, JA Gregorio, R Beivide, JM Prellezo, F Vallejo Proceedings of the 14th international conference on Supercomputing, 44-53, 2000 | 32* | 2000 |
Immucube: Scalable fault-tolerant routing for k-ary n-cube networks V Puente, JA Gregorio IEEE Transactions on Parallel and Distributed Systems 18 (6), 776-788, 2007 | 30 | 2007 |
A low cost fault tolerant packet routing for parallel computers V Puente, JA Gregorio, R Beivide, F Vallejo Proceedings International Parallel and Distributed Processing Symposium, 8 pp., 2003 | 26 | 2003 |
Immunet: Dependable routing for interconnection networks with arbitrary topology V Puente, JA Gregorio, F Vallejo, R Beivide IEEE Transactions on Computers 57 (12), 1676-1689, 2008 | 24 | 2008 |
A first glance at kilo-instruction based multiprocessors M Galluzzi, V Puente, A Cristal, R Beivide, JÁ Gregorio, M Valero Proceedings of the 1st Conference on Computing Frontiers, 212-221, 2004 | 23 | 2004 |
On the design of a high-performance adaptive router for CC-NUMA multiprocessors V Puente, JA Gregorio, R Beivide, C Izu IEEE Transactions on Parallel and Distributed Systems 14 (5), 487-501, 2003 | 19 | 2003 |
Adaptive bubble router: a design to balance latency and throughput in networks for parallel computers V Puente, JA Gregorio, JM Prellezo, R Beivide, J Duato, C Izu Proc. 22nd International Conference on Parallel Processing, 1999 | 19 | 1999 |
Flask coherence: A morphable hybrid coherence protocol to balance energy, performance and scalability LG Menezo, V Puente, JA Gregorio 2015 IEEE 21st International Symposium on High Performance Computer …, 2015 | 17 | 2015 |
A new routing mechanism for networks with irregular topology V Puente, JA Gregorio, R Beivide, F Vallejo, A Ibañez Proceedings of the 2001 ACM/IEEE conference on Supercomputing, 31-31, 2001 | 15 | 2001 |
LIGERO: a light but efficient router conceived for cache-coherent chip multiprocessors P Abad, V Puente, JA Gregorio ACM Transactions on Architecture and Code Optimization (TACO) 9 (4), 1-21, 2013 | 14 | 2013 |
High-performance adaptive routing for networks with arbitrary topology V Puente, JA Gregorio, F Vallejo, R Beivide, C Izu Journal of Systems Architecture 52 (6), 345-358, 2006 | 14 | 2006 |