SRAM for error-tolerant applications with dynamic energy-quality management in 28 nm CMOS F Frustaci, M Khayatzadeh, D Blaauw, D Sylvester, M Alioto IEEE Journal of Solid-state circuits 50 (5), 1310-1323, 2015 | 88 | 2015 |
A 0.7-V 17.4-µW 3-lead wireless ECG SoC M Khayatzadeh, X Zhang, J Tan, WS Liew, Y Lian Biomedical Circuits and Systems Conference (BioCAS), 2012 IEEE, 344-347, 2012 | 84* | 2012 |
irazor: Current-based error detection and correction scheme for pvt variation in 40-nm arm cortex-r4 processor Y Zhang, M Khayatzadeh, K Yang, M Saligane, N Pinckney, M Alioto, ... IEEE Journal of Solid-State Circuits 53 (2), 619-631, 2017 | 81 | 2017 |
8.8 iRazor: 3-transistor current-based error detection and correction in an ARM Cortex-R4 processor Y Zhang, M Khayatzadeh, K Yang, M Saligane, N Pinckney, M Alioto, ... 2016 IEEE International Solid-State Circuits Conference (ISSCC), 160-162, 2016 | 60 | 2016 |
Average-8T differential-sensing subthreshold SRAM with bit interleaving and 1k bits per bitline M Khayatzadeh, Y Lian IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (5), 971-982, 2013 | 47 | 2013 |
13.8 A 32kb SRAM for error-free and error-tolerant applications with dynamic energy-quality management in 28nm CMOS F Frustaci, M Khayatzadeh, D Blaauw, D Sylvester, M Alioto 2014 IEEE International Solid-State Circuits Conference Digest of Technical …, 2014 | 41 | 2014 |
17.3 a reconfigurable dual-port memory with error detection and correction in 28nm fdsoi M Khayatzadeh, M Saligane, J Wang, M Alioto, D Blaauw, D Sylvester 2016 IEEE International Solid-State Circuits Conference (ISSCC), 310-312, 2016 | 25 | 2016 |
All-digital SoC thermal sensor using on-chip high order temperature curvature correction M Saligane, M Khayatzadeh, Y Zhang, S Jeong, D Blaauw, D Sylvester 2015 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2015 | 17 | 2015 |
A reconfigurable sense amplifier with 3X offset reduction in 28nm FDSOI CMOS M Khayatzadeh, F Frustaci, D Blaauw, D Sylvester, M Alioto 2015 Symposium on VLSI Circuits (VLSI Circuits), C270-C271, 2015 | 15 | 2015 |
A 4.28 pJ/access high-density average-8T sub-threshold SRAM with reverse narrow-width effect (RNWE)-aware sizing M Khayatzadeh, Y Lian 2014 12th IEEE International Conference on Solid-State and Integrated …, 2014 | 3 | 2014 |
Variable-length clock stretcher with combiner timing logic F Ur Rahman, M Khayatzadeh, Z Qin, JU Shin US Patent 11,334,109, 2022 | 1 | 2022 |
Timing Margin Sensor M Khayatzadeh, S Sarkar, J Shin US Patent App. 18/104,233, 2023 | | 2023 |
Variable-length clock stretcher with correction for glitches due to finite DLL bandwidth F Ur Rahman, M Khayatzadeh, Z Qin, JU Shin US Patent 11,323,124, 2022 | | 2022 |
Variable-length clock stretcher with passive mode jitter reduction F Ur Rahman, M Khayatzadeh, JU Shin US Patent 11,290,114, 2022 | | 2022 |
Integrated circuit using topology configurations M Khayatzadeh, MB Alioto, DT Blaauw, DMC Sylvester, F ali Bohra US Patent 10,056,121, 2018 | | 2018 |
Integrated circuit using topology configurations M Khayatzadeh, MB Alioto, D Blaauw, DMC Sylvester, F ali Bohra US Patent 9,589,601, 2017 | | 2017 |
Guest Editorial—Special Issue on Selected Papers From BioCAS 2012 TP \! Jung, P \! Häfliger IEEE Transactions on Biomedical Circuits and Systems 7 (5), 561-562, 2013 | | 2013 |
ULTRALOW-POWER, LOW-VOLTAGE DIGITAL CIRCUITS FOR BIOMEDICAL SENSOR NODES M KHAYATZADEH | | 2013 |