Design and analysis of a novel low-power and energy-efficient 18T hybrid full adder M Amini-Valashani, M Ayat, S Mirzakuchaki Microelectronics journal 74, 49-59, 2018 | 80 | 2018 |
A novel fast, low-power and high-performance XOR-XNOR cell MA Valashani, S Mirzakuchaki 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 694-697, 2016 | 39 | 2016 |
A new circuit-level technique for leakage and short-circuit power reduction of static logic gates in 22-nm CMOS technology M Moradinezhad Maryan, M Amini-Valashani, SJ Azhari Circuits, Systems, and Signal Processing 40 (7), 3536-3560, 2021 | 24 | 2021 |
Two new energy-efficient full adder designs MA Valashani, S Mirzakuchaki 2016 24th Iranian Conference on Electrical Engineering (ICEE), 655-660, 2016 | 7 | 2016 |
A self-control leakage-suppression block for low-power high-efficient static logic circuit design in 22ánm CMOS process MM Maryan, SJ Azhari, M Amini-Valashani Integration 87, 1-10, 2022 | 4 | 2022 |
New MGDI-based full adder cells for energy-efficient applications M Amini-Valashani, S Mirzakuchaki International Journal of Electronics 108 (3), 462-477, 2021 | 3 | 2021 |
An input controlled leakage restrainer transistor‐based technique for leakage and short‐circuit power reduction of 1‐bit hybrid full adders M Moradinezhad Maryan, M Amini‐Valashani, SJ Azhari International Journal of Circuit Theory and Applications 49 (8), 2382-2395, 2021 | 2 | 2021 |
A circuit-level methodology for leakage power reduction of high-efficient compressors in 22-nm CMOS technology MM Maryan, SJ Azhari, M Amini-Valashani Analog Integrated Circuits and Signal Processing 110 (3), 569-581, 2022 | | 2022 |
Design of A New Low-Power High-Speed CMOS Full Adder Cell M Amini-Valashani, S Mirzakuchaki International Conference on New Research Achievements in Electrical and …, 2016 | | 2016 |
A Reliable Full-Swing and High-Performance CLRCL Full Adder M Amini-Valashani, S Aghlimoghaddam International Conference on New Research Achievements in Electrical and …, 2016 | | 2016 |