System and method for providing encrypted data to a device B Joyner, J Vaughan, J Sadowski, C Shelor US Patent App. 10/010,004, 2003 | 73 | 2003 |
Modular multiple processor architecture using distributed cross-point switch CF Shelor US Patent 4,807,184, 1989 | 47 | 1989 |
System and method for traffic shaping packet-based signals KA Lauffenburger, A Whaley, KS Fosmark, WA Perry Jr, CF Shelor US Patent 6,661,774, 2003 | 40 | 2003 |
System and method for prefetching data KA Lauffenburger, A Whaley, KS Fosmark, WA Perry Jr, CF Shelor US Patent 6,813,249, 2004 | 32 | 2004 |
Logic and method for reading data from cache C Shelor US Patent App. 10/429,009, 2004 | 25 | 2004 |
Apparatus and method for managing a processor pipeline in response to exceptions CF Shelor US Patent 7,013,383, 2006 | 22 | 2006 |
Apparatus and method for accessing registers in a processor CF Shelor US Patent 7,024,544, 2006 | 18 | 2006 |
Method and system for terminating unnecessary processing of a conditional instruction in a processor R Duncan, C Shelor US Patent App. 10/459,283, 2004 | 18 | 2004 |
Moola: Multicore cache simulator CF Shelor, KM Kavi 30th International Conference on Computers and Their Applications CATA-2015, 2015 | 13 | 2015 |
Hierarchical clock gating circuit and method CF Shelor US Patent 6,844,767, 2005 | 11 | 2005 |
Data transmission system and method of operation KA Lauffenburger, A Whaley, KS Fosmark, WA Perry Jr, CF Shelor US Patent 6,621,824, 2003 | 11 | 2003 |
Low-power decode circuitry for a processor C Shelor US Patent App. 10/410,981, 2004 | 9 | 2004 |
Low-power decode circuitry and method for a processor having multiple decoders CF Shelor US Patent 7,194,601, 2007 | 8 | 2007 |
Low-power cache and method for operating same C Shelor US Patent App. 10/406,482, 2004 | 8 | 2004 |
Reconfigurable dataflow graphs for processing-in-memory CF Shelor, KM Kavi Proceedings of the 20th International Conference on Distributed Computing …, 2019 | 6 | 2019 |
Concurrency, Synchronization, and Speculation—The Dataflow Way K Kavi, C Shelor, D Pace Advances in Computers 96, 47-104, 2015 | 6 | 2015 |
Managing registers in a processor to emulate a portion of a stack CF Shelor US Patent 7,363,475, 2008 | 6 | 2008 |
Apparatus and method for accessing registers in a processor C Shelor US Patent App. 11/314,396, 2006 | 4 | 2006 |
Dataflow based near data computing achieves excellent energy efficiency C Shelor, K Kavi Proceedings of the 8th International Symposium on Highly Efficient …, 2017 | 3 | 2017 |
Chemical treatment steel sheet, and method for producing chemical treatment steel sheet Y Tani, S Hirano, A Tachiki, M Yanagihara, M Kawabata, H Yokoya US Patent 10,294,577, 2019 | 2* | 2019 |