FPGA implementation of LDPC decoder for 5G NR with parallel layered architecture and adaptive normalization A Katyushnyj, A Krylov, A Rashich, C Zhang, K Peng 2020 IEEE International Conference on Electrical Engineering and Photonics …, 2020 | 17 | 2020 |
Experimental evaluation of SEFDM trellis based demodulator A Kislitsyn, A Krylov, A Rashich 2020 IEEE International Conference on Electrical Engineering and Photonics …, 2020 | 17 | 2020 |
Review on 5G NR LDPC Code: Recommendations for DTTB System F Li, C Zhang, K Peng, AE Krylov, AA Katyushnyj, AV Rashich, ... IEEE Access 9, 155413-155424, 2021 | 16 | 2021 |
Enhanced adaptive normalized min-sum algorithm for layered scheduling of 5G-NR LDPC codes Z Zhou, K Peng, A Krylov, A Rashich, D Tkachenko, F Li, C Zhang, J Song 2020 IEEE International Symposium on Broadband Multimedia Systems and …, 2020 | 9 | 2020 |
Polar Codes Sequential Decoder Hardware Architecture A Krylov, A Rashich, A Gelgor, D Fadeev 2019 42nd International Conference on Telecommunications and Signal …, 2019 | 6 | 2019 |
Priority Queue VLSI Architecture for Sequential Decoder of Polar Codes AE Krylov, AV Rashich, DK Fadeev, KA Sinjutin 2021 International Conference on Electrical Engineering and Photonics …, 2021 | 1 | 2021 |
FPGA Implementation of Outer Decoders for Sequential Decoder of Polar Codes N Makarov, A Krylov, A Rashich, NN Tan International Youth Conference on Electronics, Telecommunications and …, 2022 | | 2022 |
Offset Generation and Interlayer Network Architecture for 5GNR LDPC Parallel Layered Decoder with Variable Lifting Factor Support A Krylov, A Rashich, C Zhang, K Peng Internet of Things, Smart Spaces, and Next Generation Networks and Systems …, 2020 | | 2020 |