| BM-RCGL: Benchmarking approach for localization of reliability-critical gates in combinational logic blocks J Xiao, Z Shi, X Yang, J Lou IEEE Transactions on Computers 71 (5), 1063-1076, 2021 | 19 | 2021 |
| Uniform non-Bernoulli sequences oriented locating method for reliability-critical gates J Xiao, Z Shi, W Zhu, J Jiang, Q Zhou, J Lou, Y Huang, Q Ji, Z Sun Tsinghua Science and Technology 26 (1), 24-35, 2020 | 11 | 2020 |
| A novel trust evaluation method for logic circuits in IoT applications based on the E-PTM model J Xiao, J Jiang, X Li, Y Huang, X Yang, Z Shi, J Lou IEEE Access 6, 35683-35696, 2018 | 11 | 2018 |
| Circuit reliability prediction based on deep autoencoder network J Xiao, W Ma, J Lou, J Jiang, Y Huang, Z Shi, Q Shen, X Yang Neurocomputing 370, 140-154, 2019 | 10 | 2019 |
| A locating method for reliability-critical gates with a parallel-structured genetic algorithm J Xiao, ZH Shi, JH Jiang, XH Yang, YJ Huang, HG Hu Journal of Computer Science and Technology 34, 1136-1151, 2019 | 10 | 2019 |
| Identifying Reliability High-Correlated Gates of Logic Circuits With Pearson Correlation Coefficient Z Shi, J Xiao, J Jiang, Y Zhang, Y Zhou IEEE Transactions on Circuits and Systems II: Express Briefs, 2023 | 6 | 2023 |
| A Reliability-Critical Path Identifying Method with Local and Global Adjacency Probability Matrix in Combinational Circuits Z Shi, J Xiao, W Zhu, J Jiang IEEE Transactions on Computers 73 (1), 123-137, 2023 | 2 | 2023 |
| ARA-RCIV: Identifying Reliability-Critical Input Vectors of Logic Circuits based on the Association Rules Analysis Approach Z Shi, J Xiao, J Jiang, Y Zhang, Y Zhou IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024 | | 2024 |
| Locating Critical-Reliability Gates for Sequential Circuits based on the Time Window Graph Model W Zhu, J Jiang, Z Shi 2022 IEEE 31st Asian Test Symposium (ATS), 7-12, 2022 | | 2022 |
| 一种基于并行结构遗传算法的敏感性电路单元定位方法 J Xiao, ZH Shi, JH Jiang, XH Yang, YJ Huang, HG Hu 计算机科学技术学报 34 (5), 1136-1151, 2019 | | 2019 |
