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Seied Ali Hosseini
Seied Ali Hosseini
Asistant Professor of Yadegar-e-Imam Khomeini (RAH) Shahre Rey Branch, Islamic Azad University, Iran
在 iausr.ac.ir 的电子邮件经过验证
标题
引用次数
引用次数
年份
A new low power multiplexer based ternary multiplier using CNTFETs
E Shahrom, SA Hosseini
AEU-International Journal of Electronics and Communications 93, 191-207, 2018
952018
Novel ternary D-Flip-Flap-Flop and counter based on successor and predecessor in nanotechnology
K Rahbari, SA Hosseini
AEU-International Journal of Electronics and Communications 109, 107-120, 2019
422019
Novel energy-efficient and high-noise margin quaternary circuits in nanoelectronics
A Daraei, SA Hosseini
AEU-International Journal of Electronics and Communications 105, 145-162, 2019
422019
A novel multiplexer-based quaternary full adder in nanoelectronics
E Roosta, SA Hosseini
Circuits, Systems, and Signal Processing 38, 4056-4078, 2019
402019
A novel very low-complexity multi-valued logic comparator in nanoelectronics
SA Hosseini, S Etezadi
Circuits, Systems, and Signal Processing 39, 223-244, 2020
392020
Design of a multi-digit binary-to-ternary converter based on CNTFETs
M Shahangian, SA Hosseini, SH Pishgar Komleh
Circuits, Systems, and Signal Processing 38, 2544-2563, 2019
352019
A new fast algorithm for multiclass hyperspectral image classification with SVM
SA Hosseini, H Ghassemian
International journal of remote sensing 32 (23), 8657-8683, 2011
282011
Multi-digit binary-to-quaternary and quaternary-to-binary converters and their applications in nanoelectronics
M Ghelichkhan, SA Hosseini, SH Pishgar Komleh
Circuits, Systems, and Signal Processing 39, 1920-1942, 2020
262020
A novel low-complexity and energy-efficient ternary full adder in nanoelectronics
SA Hosseini, S Etezadi
Circuits, Systems, and Signal Processing 40, 1314-1332, 2021
232021
A Universal Method for Designing Multi-Digit Ternary to Binary Converter Using CNTFET
M Shahangian, SA Hosseini, RF Mirzaee
Journal of Circuits, Systems and Computers 29 (12), 2050196, 2020
172020
A novel low complexity and energy-efficient method to implement quaternary logic function in nanoelectronics
SA Hosseini, E Roosta
Microelectronics Journal 102, 104821, 2020
162020
Novel Ternary Logic Gates Design in Nanoelectronics
S Etezadi, SA Hosseini
Advances in Electrical and Electronic Engineering 17 (3), 294-305, 2019
152019
A novel technique to produce logic ‘1’in multi-threshold ternary circuits design
SA Hosseini, E Roosta
Circuits, Systems, and Signal Processing 40, 1152-1165, 2021
142021
Alternative design techniques of quaternary latch, flip-flops and counters in nanoelectronics
A Daraei, SA Hosseini
International Journal of Electronics 109 (4), 669-698, 2022
112022
Design of ternary logic gates and buffer-based memory cell in nanoelectronics
K Rahbari, SA Hosseini
International Journal of Electronics 109 (11), 1973-1995, 2022
92022
Low storage power and high noise margin ternary memory cells in nanoelectronics
SA Hosseini, S Etezadi
IET Circuits, Devices & Systems 14 (7), 929-941, 2020
72020
Novel low-complexity and energy-efficient fuzzy min and max circuits in nanoelectronics
Y Pendashteh, SA Hosseini
AEU-International Journal of Electronics and Communications 138, 153858, 2021
62021
A novel model of binary and ternary Schmitt triggers based on multi-threshold voltage in nanoelectronics
M Honaryar, SA Hosseini, SHP Komleh
AEU-International Journal of Electronics and Communications 137, 153804, 2021
52021
Boosting efficiency in dual-absorber RbPbBr3 perovskite solar cell: the role of two-dimensional GeS and SnS2 as electron transport layers
SR Rafat, Z Ahangari, MM Ahadian, SA Hosseini
Physica Scripta 99 (10), 1059b7, 2024
2024
A novel voltage controllable Schmitt trigger in nanoelectronic and its innovative applications
A Alimoradi, SA Hosseini, F Babazadeh, Z Ahangari
AEU-International Journal of Electronics and Communications 178, 155292, 2024
2024
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