| A high performance parallel Strassen implementation B Grayson, R Van De Geijn Parallel Processing Letters 6 (01), 3-12, 1996 | 86 | 1996 |
| Evolution of the samsung exynos CPU microarchitecture B Grayson, J Rupley, GZ Zuraski, E Quinnell, DA Jiménez, T Nakra, ... 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture …, 2020 | 64 | 2020 |
| Prefetching using hashed program counter HF Al-Sukhni, JC Holt, MB Smittle, MD Snyder, BC Grayson US Patent 7,506,105, 2009 | 36 | 2009 |
| Prefetching across a page boundary H Al-Sukhni, B Grayson, J Holt, M Smittle, M Snyder US Patent App. 11/120,272, 2006 | 31 | 2006 |
| Emulations between QSM, BSP and LogP: a framework for general-purpose parallel algorithm design V Ramachandran, B Grayson, M Dahlin Journal of Parallel and Distributed Computing 63 (12), 1175-1192, 2003 | 25 | 2003 |
| Emulations between QSM, BSP, and LogP: a framework for general-purpose parallel algorithm design V Ramachandran, B Grayson, M Dahlin Symposium on Discrete Algorithms: Proceedings of the tenth annual ACM-SIAM …, 1999 | 25* | 1999 |
| Pre-fetch confirmation queue A Radhakrishnan, K Sundaram, B Grayson US Patent App. 14/451,375, 2015 | 16 | 2015 |
| Writing data to system memory in a data processing system in which cache line states are tracked BC Grayson, WT Changwatchai US Patent 8,543,766, 2013 | 14 | 2013 |
| System and method for store streaming detection and handling H Wang, D Muthukrishnan, BC Grayson US Patent 10,649,904, 2020 | 13 | 2020 |
| Samsung M3 processor J Rupley, B Burgess, B Grayson, GD Zuraski IEEE Micro 39 (2), 37-44, 2019 | 13 | 2019 |
| Computing system with stride prefetch mechanism and method of operation thereof A Radhakrishnan, K Sundaram, B Grayson US Patent App. 14/832,547, 2016 | 12 | 2016 |
| Experimental evaluation of QSM, a simple shared-memory model B Grayson, M Dahlin, V Ramachandran Proceedings 13th International Parallel Processing Symposium and 10th …, 1999 | 11 | 1999 |
| Armadillo: A high-performance processor simulator BC Grayson University of Texas at Austin, 1996 | 11 | 1996 |
| Method and apparatus for address translation B Grayson US Patent App. 11/013,807, 2006 | 10 | 2006 |
| Statistics on concurrent fault and design error simulation B Grayson, SA Shaikh, SA Szygenda Proceedings of ICCD'95 International Conference on Computer Design. VLSI in …, 1995 | 9 | 1995 |
| Pre-fetch chaining A Radhakrishnan, K Lepak, R Gopal, M Chinnakonda, K Sundaram, ... US Patent 9,569,361, 2017 | 8 | 2017 |
| Pseudo least recently used (plru) cache replacement BC Grayson, KM Bruce, AD Ngo, MD Snyder US Patent App. 11/929,180, 2009 | 8 | 2009 |
| Suppression of redundant cache status updates BC Grayson, DP Burgess, PJ Wilson US Patent App. 13/732,533, 2014 | 7 | 2014 |
| The effects of memory-access ordering on multiple-issue uniprocessor performance B Grayson, L John, C Chase 1999 IEEE International Performance, Computing and Communications Conference …, 1999 | 3 | 1999 |
| Characterizing instruction latency for speculative issue SMPs: a case study of varying memory system performance on the SPLASH-2 benchmarks B Grayson, C Chase Workload Characterization: Methodology and Case Studies. Based on the First …, 1998 | 2 | 1998 |
