| Semiconductor device and method for manufacturing the same Y Kurita US Patent 7,795,721, 2010 | 189 | 2010 |
| Semiconductor device and method of manufacturing the same M Kawano, K Soejima, N Takahashi, Y Kurita, M Komuro, S Matsui US Patent App. 11/602,346, 2007 | 141 | 2007 |
| A 3D stacked memory integrated on a logic device using SMAFTI technology Y Kurita, S Matsui, N Takahashi, K Soejima, M Komuro, M Itou, ... 2007 Proceedings 57th Electronic Components and Technology Conference, 821-829, 2007 | 126 | 2007 |
| A 3D packaging technology for 4 Gbit stacked DRAM with 3 Gbps data transfer M Kawano, S Uchiyama, Y Egawa, N Takahashi, Y Kurita, K Soejima, ... 2006 International Electron Devices Meeting, 1-4, 2006 | 114 | 2006 |
| Three-dimensional packaging technology for stacked DRAM with 3-Gb/s data transfer M Kawano, N Takahashi, Y Kurita, K Soejima, M Komuro, S Matsui IEEE Transactions on Electron Devices 55 (7), 1614-1620, 2008 | 102 | 2008 |
| Semiconductor device and method for manufacturing the same Y Kurita, T Shironouchi, T Tetsuka US Patent 6,930,396, 2005 | 98 | 2005 |
| Thin planar semiconductor device having electrodes on both surfaces and method of fabricating same Y Kurita US Patent 7,034,386, 2006 | 96 | 2006 |
| Semiconductor device and manufacturing method thereof Y Kurita US Patent 8,349,649, 2013 | 66 | 2013 |
| Electronic device and method of manufacturing the same Y Kurita, M Kawano, K Soejima US Patent 8,354,340, 2013 | 61 | 2013 |
| System in wafer-level package technology with RDL-first process N Motohashi, T Kimura, K Mineo, Y Yamada, T Nishiyama, K Shibuya, ... 2011 IEEE 61st Electronic Components and Technology Conference (ECTC), 59-64, 2011 | 61 | 2011 |
| A novel" SMAFTI" package for inter-chip wide-band data transfer Y Kurita, K Soejima, K Kikuchi, M Takahashi, M Tago, M Koike, L Shibuya, ... 56th Electronic Components and Technology Conference 2006, 9 pp., 2006 | 56 | 2006 |
| Fan-out wafer-level packaging with highly flexible design capabilities Y Kurita, T Kimura, K Shibuya, H Kobayashi, F Kawashiro, N Motohashi, ... 3rd Electronics System Integration Technology Conference ESTC, 1-6, 2010 | 54 | 2010 |
| Vertical integration of stacked DRAM and high-speed logic device using SMAFTI technology Y Kurita, S Matsui, N Takahashi, K Soejima, M Komuro, M Itou, M Kawano IEEE transactions on advanced packaging 32 (3), 657-665, 2009 | 54 | 2009 |
| Semiconductor device having a sealing resin and method of manufacturing the same Y Kurita US Patent 8,193,033, 2012 | 50 | 2012 |
| Semiconductor device having fan-in and fan-out redistribution layers Y Kurita, H Ezawa, K Kawasaki, S Tsukiyama US Patent 9,396,998, 2016 | 48 | 2016 |
| Semiconductor device and method of manufacturing the same M Kawano, K Soejima, Y Kurita US Patent 7,800,233, 2010 | 46 | 2010 |
| Multilayered wiring board, semiconductor device in which multilayered wiring board is used, and method for manufacturing the same K Kikuchi, S Yamamichi, Y Kurita, K Soejima US Patent 8,039,756, 2011 | 38 | 2011 |
| Development of 3D-packaging process technology for stacked memory chips T Mitsuhashi, Y Egawa, O Kato, Y Saeki, H Kikuchi, S Uchiyama, ... MRS Online Proceedings Library (OPL) 970, 0970-Y03-06, 2006 | 38 | 2006 |
| Semiconductor device including microstrip line and coplanar line K Soejima, M Kawano, Y Kurita US Patent App. 11/987,624, 2008 | 35 | 2008 |
| Semiconductor device including a heat-transmitting and electromagnetic-noise-blocking substance and method of manufacturing the same S Kawakami, Y Kurita, T Kimura, R Kuroda US Patent 7,667,312, 2010 | 34 | 2010 |
Masaya KAWANOThe University of Tokyo在 dlab.t.u-tokyo.ac.jp 的电子邮件经过验证
