Semiconductor device having a gap defined therein JJ Xu, K Rim, JJ Zhu, SS Song, M Badaroglu, V Machkaoutsan, D Yang, ... US Patent 9,871,121, 2018 | 48 | 2018 |
Contact wrap around structure JJ Xu, SS Song, V Machkaoutsan, M Badaroglu, J Bao, JJ Zhu, D Yang, ... US Patent 9,953,979, 2018 | 46 | 2018 |
Grounding dummy gate in scaled layout design SS Song, Z Wang, O Kwon, K Rim, JJ Zhu, X Chen, F Vang, RG Stephany, ... US Patent 9,379,058, 2016 | 42 | 2016 |
High density static random access memory array having advanced metal patterning N Mojumder, SS Song, Z Wang, C fei Yeap US Patent 9,318,564, 2016 | 41 | 2016 |
Silicon germanium FinFET formation by Ge condensation JJ Xu, V Machkaoutsan, K Rim, SS Song, C fei Yeap US Patent 9,257,556, 2016 | 41 | 2016 |
Adjacent device isolation V Machkaoutsan, M Badaroglu, JJ Xu, SS Song, C fei Yeap US Patent 9,502,414, 2016 | 32 | 2016 |
Silicon germanium read port for a static random access memory register file N Mojumder, SS Song, Z Wang, C fei Yeap US Patent 9,336,864, 2016 | 32 | 2016 |
Device and method to connect gate regions separated using a gate cut Y Liu, SS Song, K Rim US Patent 9,853,112, 2017 | 31 | 2017 |
Self-aligned structure SS Song, JJ Xu, K Rim, D Yang, JJ Zhu, J Bao, NN Mojumder, ... US Patent 9,799,560, 2017 | 30 | 2017 |
Self-aligned metal cut and via for back-end-of-line (BEOL) processes for semiconductor integrated circuit (IC) fabrication, and related processes and devices V Machkaoutsan, SS Song, JJ Zhu, J Bao, JJ Xu, M Badaroglu, ... US Patent 9,793,164, 2017 | 30 | 2017 |
Standard cell architecture with M1 layer unidirectional routing M Gupta, X Chen, O Kwon, F Vang, SS Song, K Rim US Patent 9,887,209, 2018 | 29 | 2018 |
Reverse self aligned double patterning process for back end of line fabrication of a semiconductor device SS Song, C fei Yeap, Z Wang, JJ Zhu US Patent 9,941,154, 2018 | 28 | 2018 |
Fin-type semiconductor device X Li, B Yang, SS Song US Patent 8,999,792, 2015 | 27 | 2015 |
Integrated circuits including a FinFET and a nanostructure FET SS Song, JJ Xu, K Rim, C fei Yeap US Patent 10,439,039, 2019 | 26 | 2019 |
Conductive cap for metal-gate transistor H Yang, SS Song US Patent 9,698,232, 2017 | 24 | 2017 |
Three-port bit cell having increased width NN Mojumder, SS Song, Z Wang, C fei Yeap US Patent 9,536,596, 2017 | 22 | 2017 |
Embedded polysilicon resistor in integrated circuits formed by a replacement gate process KY Lim, KD Lee, SS Song US Patent 8,865,542, 2014 | 20 | 2014 |
Vertically stacked nanowire field effect transistors V Machkaoutsan, SS Song, M Badaroglu, JJ Zhu, J Bao, JJ Xu, D Yang, ... US Patent 10,043,796, 2018 | 18 | 2018 |
Recessed channel insulated-gate field effect transistor with self-aligned gate and increased channel length KY Lim, SS Song, A Jain US Patent 8,865,549, 2014 | 18 | 2014 |
Adjacent device isolation V Machkaoutsan, M Badaroglu, JJ Xu, SS Song, C fei Yeap US Patent 9,824,936, 2017 | 17 | 2017 |