| A 3.9 ppm/○ C, 31.5 ppm/V ultra-low-power subthreshold CMOS-only voltage reference J Liao, Y Zeng, J Li, J Yang, HZ Tan Microelectronics Journal 96, 104706, 2020 | 6 | 2020 |
| Performance optimization for LDO regulator based on the differential evolution J Li, Y Zeng, H Wu, R Li, J Zhang, HZ Tan 2019 IEEE 13th international conference on ASIC (ASICON), 1-4, 2019 | 5 | 2019 |
| Automatic structure generation and parameter optimization for cmos voltage reference circuit J Li, Y Zeng, J Wang, J Liao, J Yang, HZ Tan IEEE Access 8, 54303-54313, 2020 | 4 | 2020 |
| A 67-pW,-162-dB PSRR multi-output voltage reference with multi-loop active load for wireless sensor nodes J Yang, J Li, W Huang, Y Zeng AEU-International Journal of Electronics and Communications 169, 154748, 2023 | 3 | 2023 |
| Performance-Driven Analog Layout Automation: Current Status and Future Directions P Xu, J Li, TY Ho, B Yu, K Zhu | 1 | 2024 |
| Knowledge Transfer Framework for PVT Robustness in Analog Integrated Circuits J Li, Y Zeng, H Zhi, J Yang, W Shan, Y Li, Y Li IEEE Transactions on Circuits and Systems I: Regular Papers, 2023 | 1 | 2023 |
| Multi-Task Evolutionary to PVT Knowledge Transfer for Analog Integrated Circuit Optimization J Li, H Zhi, W Shan, Y Li, Y Zeng, Y Li 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD), 1-9, 2023 | 1 | 2023 |
| Robust circuit optimization under PVT variations via weight optimization problem reformulation J Li, Y Li, Y Zeng Expert Systems with Applications 248, 123301, 2024 | | 2024 |
| A Compact and Robust 28nm CMOS Temperature Sensor with Machine Learning Assisted Design for DVFS SoC Y Ding, H Zhi, J Li, Z Chen, K Yang, W Shan 2023 IEEE International Conference on Integrated Circuits, Technologies and …, 2023 | | 2023 |
| Circuit Optimization over Multiple Process Corners for Analog Electronic Design Automation J Li, S Wang, Z Li, T Huang, YS Han, Y Li 2023 28th International Conference on Automation and Computing (ICAC), 1-6, 2023 | | 2023 |
