| Factored forms for memristive material implication stateful logic FS Marranghello, V Callegaro, MGA Martins, AI Reis, RP Ribas IEEE Journal on Emerging and Selected Topics in Circuits and Systems 5 (2 …, 2015 | 26 | 2015 |
| SOP based logic synthesis for memristive IMPLY stateful logic FS Marranghello, V Callegaro, AI Reis, RP Ribas 2015 33rd IEEE International Conference on Computer Design (ICCD), 228-235, 2015 | 16 | 2015 |
| maj- Logic Synthesis for Emerging Technology A Neutzling, FS Marranghello, JM Matos, A Reis, RP Ribas IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2019 | 15 | 2019 |
| Four-level forms for memristive material implication logic FS Marranghello, V Callegaro, AI Reis, RP Ribas IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (5 …, 2019 | 12 | 2019 |
| Improved logic synthesis for memristive stateful logic using multi-memristor implication FS Marranghello, V Callegaro, MGA Martins, AI Reis, RP Ribas 2015 IEEE international symposium on circuits and systems (ISCAS), 181-184, 2015 | 12 | 2015 |
| Majority-based logic synthesis for nanometric technologies MGA Martins, V Callegaro, FS Marranghello, RP Ribas, AI Reis 14th IEEE International Conference on Nanotechnology, 256-261, 2014 | 12 | 2014 |
| Spin diode network synthesis using functional composition MGA Martins, FS Marranghello, JS Friedman, AV Sahakian, RP Ribas, ... 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6, 2013 | 11 | 2013 |
| Impact and optimization of lithography-aware regular layout in digital circuit design V Dal Bem, P Butzen, FS Marranghello, AI Reis, RP Ribas 2011 IEEE 29th International Conference on Computer Design (ICCD), 279-284, 2011 | 11 | 2011 |
| SAT-sweeping enhanced for logic synthesis L Amarú, F Marranghello, E Testa, C Casares, V Possani, J Luo, P Vuillod, ... 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020 | 10 | 2020 |
| Bottom-up disjoint-support decomposition based on cofactor and boolean difference analysis V Callegaro, FS Marranghello, MGA Martins, RP Ribas, AI Reis 2015 33rd IEEE International Conference on Computer Design (ICCD), 680-687, 2015 | 9 | 2015 |
| CMOS inverter analytical delay model considering all operating regions FS Marranghello, AI Reis, RP Ribas 2014 IEEE International Symposium on Circuits and Systems (ISCAS), 1452-1455, 2014 | 9 | 2014 |
| CMOS inverter delay model based on DC transfer curve for slow input FS Marranghello, AI Reis, RP Ribas International Symposium on Quality Electronic Design (ISQED), 651-657, 2013 | 8 | 2013 |
| LUT-based optimization for ASIC design flow L Amarú, V Possani, E Testa, F Marranghello, C Casares, J Luo, P Vuillod, ... 2021 58th ACM/IEEE Design Automation Conference (DAC), 871-876, 2021 | 7 | 2021 |
| One-sided countermeasures for side-channel attacks can backfire Y Yu, F Marranghello, VD Teijeira, E Dubrova Proceedings of the 11th ACM Conference on Security & Privacy in Wireless and …, 2018 | 7 | 2018 |
| Exact benchmark circuits for logic synthesis WL Neto, VN Possani, FS Marranghello, JM Matos, PE Gaillardon, AI Reis, ... IEEE Design & Test 37 (3), 51-58, 2019 | 5 | 2019 |
| Improving analytical delay modeling for CMOS inverters FS Marranghello, RP Ribas, AI Reis Journal of integrated circuits and systems. Porto Alegre. Vol. 10, no. 2 …, 2015 | 5 | 2015 |
| Enhanced spin-diode synthesis using logic sharing M Martins, F Marranghello, J Friedman, A Sahakian, R Ribas, A Reis 2015 Euromicro Conference on Digital System Design, 218-224, 2015 | 3 | 2015 |
| Delay model for static CMOS complex gates FS Marranghello, AI Reis, RP Ribas 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6, 2013 | 3 | 2013 |
| Design-oriented delay model for CMOS inverter FS Marranghello, AI Reis, RP Ribas 2012 25th Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6, 2012 | 3 | 2012 |
| Evaluation of Diferrent XOR Gates AW Júnior, FS Marranghello, RP Ribas, AI Reis pp (1-4), 55-58, 2009 | 3 | 2009 |
Andre ReisInstitute of Informatics - UFRGS在 inf.ufrgs.br 的电子邮件经过验证
