| Bus interface system and method RH Sartore, SP Larky US Patent 6,012,103, 2000 | 173 | 2000 |
| System for reconfiguring a peripheral device by downloading information from a host and electronically simulating a physical disconnection and reconnection to reconfigure the … RH Sartore, SP Larky US Patent 6,493,770, 2002 | 80 | 2002 |
| Method of email attachment confirmation S Larky, RH Sartore US Patent 6,970,908, 2005 | 78 | 2005 |
| Dedicated circuit and method for enumerating and operating a peripheral device on a universal serial bus SP Larky, L Hauck US Patent 6,389,495, 2002 | 63 | 2002 |
| Device and method for managing power consumed by a USB device SP Larky US Patent 7,194,638, 2007 | 55 | 2007 |
| Device and method for interconnecting universal serial buses including power management SP Larky, S Swindle, J Boynton US Patent 6,105,097, 2000 | 54 | 2000 |
| Universal serial bus interface system and method RH Sartore, SP Larky US Patent 6,249,825, 2001 | 48 | 2001 |
| Device and method for efficient bulk data retrieval using a universal serial bus SP Larky, S Swindle, S Kolokowsly, M McCoy US Patent 6,311,294, 2001 | 47 | 2001 |
| Fault tolerant USB method and apparatus RH Sartore, SP Larky US Patent 6,625,761, 2003 | 38 | 2003 |
| Device and method for synchronizing the clocks of interconnected universal serial buses SP Larky, S Swindle US Patent 6,092,210, 2000 | 36 | 2000 |
| System and method for updating the data stored in a cache memory attached to an input/output system LS Clark, SP Larky US Patent 6,065,099, 2000 | 30 | 2000 |
| Speed power efficient USB method RH Sartore, SP Larky, CG Phelan US Patent 6,839,778, 2005 | 27 | 2005 |
| Fault tolerant USB method and apparatus RH Sartore, SP Larky US Patent 6,671,831, 2003 | 26 | 2003 |
| Method for using a recovered data-encoded clock to convert high-frequency serial data to lower frequency parallel data LS Clark, SP Larky US Patent 6,509,851, 2003 | 19 | 2003 |
| Apparatus and method to test high speed devices with a low speed tester SP Larky, PD Berndt, M Lewis, S Swindle US Patent 6,959,257, 2005 | 18 | 2005 |
| Method, system, and computer program product for designing an integrated circuit using substitution of standard cells with substitute cells having differing electrical … J Bolander, SP Larky US Patent 7,055,121, 2006 | 17 | 2006 |
| Flexible converter routing apparatus, system and method TJ Williams, SP Larky, DG Wright US Patent 6,580,623, 2003 | 14 | 2003 |
| Method and apparatus implementing a FIFO with discrete blocks SA Swindle, LT Hauck, SH Kolokowsky, SP Larky US Patent 6,779,061, 2004 | 13 | 2004 |
| Scan testing of integrated circuits with high-speed serial interface PD Berndt, S Larky US Patent 7,428,678, 2008 | 12 | 2008 |
| Linearized digital phase-locked loop method for maintaining end of packet time linearity SM Prather, MS Berzins, CA Cornell, SP Larky, JA Cetin US Patent 7,826,581, 2010 | 8 | 2010 |
