Low Power SRAM Design with Reduced Read/Write Time Shivani Yadav, Neha Malik, Ashutosh Gupta, Sachin Rajput International Journal of Information and Computation Technology 3 (3), pp …, 2013 | 25* | 2013 |
Two-stage high gain low power OpAmp with current buffer compensation SK Rajput, BK Hemant Global High Tech Congress on Electronics (GHTCE), 2013 IEEE, 121-124, 2013 | 17 | 2013 |
Design of low power magnitude comparator A Gupta, M Khatri, SK Rajput, A Mehra, S Bathla 2017 7th International Conference on Cloud Computing, Data Science …, 2017 | 8 | 2017 |
A novel power efficient XOR gate based on single inverted input A Garg, D Agrawal, S Rajput, S Singhal, A Mehra 2018 2nd International Conference on Trends in Electronics and Informatics …, 2018 | 6 | 2018 |
Area efficient modified booth adder based on sklansky adder A Garg, D Agrawal, P Kularia, N Gaur, A Mehra, S Rajput 2017 2nd International Conference for Convergence in Technology (I2CT), 308-312, 2017 | 5 | 2017 |
Hybrid Plasmonic Waveguide Bio-Chemical Sensor for Different Chemical Concentrations S Rajora, SK Rajput Journal of Nanoelectronics and Optoelectronics 12 (2), 136-139, 2017 | 4 | 2017 |
Design of 2-bit Vedic multiplier using PTL and CMOS Logic G Bajaj, K Grover, A Mehra, SK Rajput Intelligent Communication, Control and Devices: Proceedings of ICICCD 2017 …, 2018 | 3 | 2018 |
Series computation using Vedic mathematics A Mehra, V Verma, SK Rajput, D Tyagi 2016 Conference on Advances in Signal Processing (CASP), 504-506, 2016 | 2 | 2016 |
A Novel Power Efficient 12T Full Adder A Mehra, A Bahukhandi, A Kaur, S Katyar, S Khajuria, SK Rajput, N Gaur International Journal of Simulation Systems, Science & Technology 15 (05), 44-48, 2014 | 2 | 2014 |
Analysis of Power Reduction Techniques in Digital Circuits in Submicron Regime A Gupta, D Gupta, S Singhal, S Rajput, A Mehra 2018 Second International Conference on Electronics, Communication and …, 2018 | 1 | 2018 |
Low Power Adder Circuit Based on Coupling Technique A Roy, A Sharma, A Mehra, SK Rajput Intelligent Communication, Control and Devices: Proceedings of ICICCD 2017 …, 2018 | 1 | 2018 |
Multilayer coatings with slotted MDM surface plasmon waveguide for the improvement of sensitivity and transmission with high refractive index material S Rajora, SK Rajput 2016 International Conference on Computing, Communication and Automation …, 2016 | 1 | 2016 |
COMPARATIVE ANALYSIS OF CURRENT DIFFERENCING BUFFER AMPLIFIERS SK Rajput, A Mehra ARPN Journal of Engineering and Applied Sciences 10 (16), 7124-7130, 2015 | 1* | 2015 |
Design of Two-stage High Gain Operational Amplifier Using Current Buffer Compensation for Low Power Applications SK Rajput Thapar University Patiala, 2009 | 1 | 2009 |
Iterative Basic Block Pipelining Implementation as Fast Computation Technique P Shikha, M Sharma, S Rajput Intelligent Communication, Control and Devices: Proceedings of ICICCD 2017 …, 2018 | | 2018 |
High Speed-Low Power Divide-by-16/17 Dual Modulus Prescaler Using C2MOS A Chakraborty, A Agrawal, S Gupta, SK Rajput, A Mehra Proceeding of International Conference on Intelligent Communication, Control …, 2017 | | 2017 |
Design and Performance Analysis of Bowtie-Shaped Slotted Rectangular Patch Antenna for Terahertz (THz) Applications D Kumar, MR Tripathy, SK Rajput, A Kumar, M Sharma Proceeding of International Conference on Intelligent Communication, Control …, 2017 | | 2017 |
Low power divide-by-8/9 dual modulus C2MOS prescaler A Agrawal, S Gupta, A Chakraborty, A Mehra, SK Rajput, D Tyagi 2016 Conference on Advances in Signal Processing (CASP), 461-464, 2016 | | 2016 |