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Oliver Reiche
Oliver Reiche
在 cs.fau.de 的电子邮件经过验证 - 首页
标题
引用次数
引用次数
年份
HIPAcc: A Domain-Specific Language and Compiler for Image Processing
R Membarth, O Reiche, F Hannig, J Teich, M Körner, W Eckert
IEEE Transactions on Parallel and Distributed Systems 27 (1), 210-224, 2015
1432015
Invasive tightly-coupled processor arrays: A domain-specific architecture/compiler co-design approach
F Hannig, V Lari, S Boppu, A Tanase, O Reiche
ACM Transactions on Embedded Computing Systems (TECS) 13 (4s), 1-29, 2014
892014
Code generation from a domain-specific language for C-based HLS of hardware accelerators
O Reiche, M Schmid, F Hannig, R Membarth, J Teich
Proceedings of the 2014 International Conference on Hardware/Software …, 2014
622014
Generating FPGA-based image processing accelerators with Hipacc
O Reiche, MA Özkan, R Membarth, J Teich, F Hannig
2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD …, 2017
452017
FPGA-based accelerator design from a domain-specific language
MA Özkan, O Reiche, F Hannig, J Teich
2016 26th International Conference on Field Programmable Logic and …, 2016
392016
Code generation for embedded heterogeneous architectures on Android
R Membarth, O Reiche, F Hannig, J Teich
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014
382014
From loop fusion to kernel fusion: A domain-specific approach to locality optimization
B Qiao, O Reiche, F Hannig, J Teich
2019 IEEE/ACM International Symposium on Code Generation and Optimization …, 2019
352019
Automatic kernel fusion for image processing DSLs
B Qiao, O Reiche, F Hannig, J Teich
Proceedings of the 21st International Workshop on Software and Compilers for …, 2018
232018
Towards a performance-portable description of geometric multigrid algorithms using a domain-specific language
R Membarth, O Reiche, C Schmitt, F Hannig, J Teich, M Stürmer, ...
Journal of Parallel and Distributed Computing 74 (12), 3191-3201, 2014
212014
Auto-vectorization for image processing DSLs
O Reiche, C Kobylko, F Hannig, J Teich
Proceedings of the 18th ACM SIGPLAN/SIGBED Conference on Languages …, 2017
172017
Automatic optimization of hardware accelerators for image processing
O Reiche, K Häublein, M Reichenbach, F Hannig, J Teich, D Fey
arXiv preprint arXiv:1502.07448, 2015
152015
Code generation for high-level synthesis of multiresolution applications on fpgas
M Schmid, O Reiche, C Schmitt, F Hannig, J Teich
arXiv preprint arXiv:1408.4721, 2014
152014
Loop coarsening in C-based high-level synthesis
M Schmid, O Reiche, F Hannig, J Teich
2015 IEEE 26th International Conference on Application-specific Systems …, 2015
142015
Synthesis and optimization of image processing accelerators using domain knowledge
O Reiche, K Häublein, M Reichenbach, M Schmid, F Hannig, J Teich, ...
Journal of Systems Architecture 61 (10), 646-658, 2015
132015
A highly efficient and comprehensive image processing library for C++-based high-level synthesis
MA Özkan, O Reiche, F Hannig, J Teich
FSP 2017; Fourth International Workshop on FPGAs for Software Programmers, 1-10, 2017
122017
Loop parallelization techniques for fpga accelerator synthesis
O Reiche, MA Özkan, F Hannig, J Teich, M Schmid
Journal of Signal Processing Systems 90, 3-27, 2018
112018
Hardware design and analysis of efficient loop coarsening and border handling for image processing
MA Özkan, O Reiche, F Hannig, J Teich
2017 IEEE 28th International Conference on Application-specific Systems …, 2017
102017
Modeling, programming and performance analysis of automotive environment map representations on embedded GPUs
J Fickenscher, O Reiche, J Schlumberger, F Hannig, J Teich
2016 IEEE International High Level Design Validation and Test Workshop …, 2016
82016
A High-Performance Image Processing DSL for Heterogeneous Architectures.
K Selgrad, A Lier, J Dörntlein, O Reiche, M Stamminger
ELS, 39-46, 2016
82016
Hybrid code description for developing fast and resource efficient image processing architectures
K Häublein, M Reichenbach, O Reiche, MA Özkan, D Fey, F Hannig, ...
2016 International Conference on Embedded Computer Systems: Architectures …, 2016
52016
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