| PAC-PL: Enabling control-flow integrity with pointer authentication in FPGA SoC platforms G Serra, P Fara, G Cicero, F Restuccia, A Biondi 2022 IEEE 28th Real-Time and Embedded Technology and Applications Symposium …, 2022 | 9 | 2022 |
| An architecture for declarative real-time scheduling on Linux G Serra, G Ara, P Fara, T Cucinotta 2020 IEEE 23rd International Symposium on Real-Time Distributed Computing …, 2020 | 5 | 2020 |
| Maximizing the security level of real-time software while preserving temporal constraints S Di Leonardi, F Aromolo, P Fara, G Serra, D Casini, A Biondi, G Buttazzo IEEE Access 11, 35591-35607, 2023 | 3 | 2023 |
| ReTiF: A declarative real-time scheduling framework for POSIX systems G Serra, G Ara, P Fara, T Cucinotta Journal of Systems Architecture 118, 102210, 2021 | 3 | 2021 |
| Scheduling replica voting in fixed-priority real-time systems P Fara, G Serra, A Biondi, C Donnarumma 33rd Euromicro Conference on Real-Time Systems (ECRTS 2021) 1, 2021 | 3 | 2021 |
| EN-50128 certification-oriented design of a safety-critical hard real-time kernel C Donnarumma, P Fara, G Serra, S Di Leonardi, M Marinoni 2019 IEEE International Symposium on Software Reliability Engineering …, 2019 | 3 | 2019 |
| Improving safety and security on real-time safety-critical systems P FARA | | 2024 |
| Bounded transmission latency in real-time edge computing: a scheduling analysis P Fara, G Serra, F Aromolo 2023 26th Euromicro Conference on Digital System Design (DSD), 618-625, 2023 | | 2023 |
| Enhancing the Availability of Web Services in the IoT-to-Edge-to-Cloud Compute Continuum: A WordPress Case Study G Serra, P Fara, D Casini 2023 26th Euromicro Conference on Digital System Design (DSD), 602-609, 2023 | | 2023 |
| Riconoscimento automatico di accordi e note eseguiti da strumenti musicali P FARA | | 2015 |
| Cyber security & Safety critical Software G Buttazzo, M Di Natale, T Cucinotta, A Biondi, D Casini, P Fara, ... | | |
| No-more-unbounded-blocking queues: bounding transmission latencies in real-time edge computing G Serra, P Fara RAGE 2022, 36, 0 | | |
Gabriele SerraR&D Engineer, Accelerat S.r.l.在 santannapisa.it 的电子邮件经过验证
