An FPGA-based linear all-digital phase-locked loop M Kumm, H Klingbeil, P Zipf IEEE Transactions on Circuits and Systems I: Regular Papers 57 (9), 2487-2497, 2010 | 101 | 2010 |
CORDIC II: a new improved CORDIC algorithm M Garrido, P Källström, M Kumm, O Gustafsson IEEE Transactions on Circuits and Systems II: Express Briefs 63 (2), 186-190, 2015 | 100 | 2015 |
Pipelined adder graph optimization for high speed multiple constant multiplication M Kumm, P Zipf, M Faust, CH Chang 2012 IEEE International Symposium on Circuits and Systems (ISCAS), 49-52, 2012 | 70 | 2012 |
An efficient softcore multiplier architecture for Xilinx FPGAs M Kumm, S Abbas, P Zipf 2015 IEEE 22nd Symposium on Computer Arithmetic, 18-25, 2015 | 61 | 2015 |
AddNet: Deep neural networks using FPGA-optimized multipliers J Faraone, M Kumm, M Hardieck, P Zipf, X Liu, D Boland, PHW Leong IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (1), 115-128, 2019 | 58 | 2019 |
Pipelined compressor tree optimization using integer linear programming M Kumm, P Zipf 2014 24th International Conference on Field Programmable Logic and …, 2014 | 53 | 2014 |
A digital beam-phase control system for heavy-ion synchrotrons H Klingbeil, B Zipfel, M Kumm, P Moritz IEEE Transactions on Nuclear Science 54 (6), 2604-2610, 2007 | 49 | 2007 |
Dynamically reconfigurable FIR filter architectures with fast reconfiguration M Kumm, K Möller, P Zipf 2013 8th International Workshop on Reconfigurable and Communication-Centric …, 2013 | 48 | 2013 |
Efficient High Speed Compression Trees on Xilinx FPGAs. M Kumm, P Zipf MBMV, 171-182, 2014 | 47 | 2014 |
Advanced compressor tree synthesis for FPGAs M Kumm, J Kappauf IEEE Transactions on Computers 67 (8), 1078-1091, 2018 | 44 | 2018 |
Efficient error-tolerant quantized neural network accelerators G Gambardella, J Kappauf, M Blott, C Doehring, M Kumm, P Zipf, ... 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2019 | 43 | 2019 |
Optimization of high speed pipelining in FPGA-based FIR filter design using genetic algorithm U Meyer-Baese, G Botella, DET Romero, M Kumm Independent Component Analyses, Compressive Sampling, Wavelets, Neural Net …, 2012 | 40 | 2012 |
Multiple constant multiplication with ternary adders M Kumm, M Hardieck, J Willkomm, P Zipf, U Meyer-Baese 2013 23rd International Conference on Field programmable Logic and …, 2013 | 38 | 2013 |
Optimal constant multiplication using integer linear programming M Kumm IEEE Transactions on Circuits and Systems II: Express Briefs 65 (5), 567-571, 2018 | 36 | 2018 |
Multiple constant multiplication optimizations for field programmable gate arrays M Kumm, P Zipf Springer Fachmedien Wiesbaden, 2016 | 32 | 2016 |
High speed low complexity FPGA-based FIR filters using pipelined adder graphs M Kumm, P Zipf 2011 International Conference on Field-Programmable Technology, 1-4, 2011 | 31 | 2011 |
Resource optimal design of large multipliers for FPGAs M Kumm, J Kappauf, M Istoan, P Zipf 2017 IEEE 24th Symposium on Computer Arithmetic (ARITH), 131-138, 2017 | 30 | 2017 |
Optimal single constant multiplication using ternary adders M Kumm, O Gustafsson, M Garrido, P Zipf IEEE Transactions on Circuits and Systems II: Express Briefs 65 (7), 928-932, 2016 | 30 | 2016 |
Reconfigurable FIR filter using distributed arithmetic on FPGAs M Kumm, K Möller, P Zipf 2013 IEEE International Symposium on Circuits and Systems (ISCAS), 2058-2061, 2013 | 30 | 2013 |
Comparison of arithmetic number formats for inference in sum-product networks on FPGAs L Sommer, L Weber, M Kumm, A Koch 2020 IEEE 28th Annual international symposium on field-programmable custom …, 2020 | 29 | 2020 |