| Low-complexity decoding for non-binary LDPC codes in high order fields A Voicila, D Declercq, F Verdier, M Fossorier, P Urard IEEE transactions on communications 58 (5), 1365-1375, 2010 | 293 | 2010 |
| Low-complexity, low-memory EMS algorithm for non-binary LDPC codes A Voicila, D Declercq, F Verdier, M Fossorier, P Urard 2007 IEEE International Conference on Communications, 671-676, 2007 | 114 | 2007 |
| Architecture of a low-complexity non-binary LDPC decoder for high order fields A Voicila, F Verdier, D Declercq, M Fossorier, P Urard 2007 International Symposium on Communications and Information Technologies …, 2007 | 72 | 2007 |
| A DVB-S2 compliant LDPC decoder integrating the Horizontal Shuffle Scheduling A Segard, F Verdier, D Declercq, P Urard 2006 International Symposium on Intelligent Signal Processing and …, 2005 | 59 | 2005 |
| Choice of ethereum clients for private blockchain: Assessment from proof of authority perspective CN Samuel, S Glock, F Verdier, P Guitton-Ouhamou 2021 IEEE International Conference on Blockchain and Cryptocurrency (ICBC), 1-5, 2021 | 32 | 2021 |
| Multiprocessor task migration implementation in a reconfigurable platform L Gantel, S Layouni, MEA Benkhelifa, F Verdier, S Chauvet 2009 International Conference on Reconfigurable Computing and FPGAs, 362-367, 2009 | 31 | 2009 |
| Multi-shape tasks scheduling for online multitasking on FPGAs G Wassi, MEA Benkhelifa, G Lawday, F Verdier, S Garcia 2014 9th International Symposium on Reconfigurable and Communication-Centric …, 2014 | 29 | 2014 |
| Transaction level modelling of SCA compliant software defined radio waveforms and platforms PIM/PSM G Gailliard, E Nicollet, M Sarlotte, F Verdier 2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007 | 29 | 2007 |
| Module relocation in heterogeneous reconfigurable systems-on-chip using the xilinx isolation design flow L Gantel, MEA Benkhelifa, F Lemonnier, F Verdier 2012 International Conference on Reconfigurable Computing and FPGAs, 1-6, 2012 | 24 | 2012 |
| A low-cost parallel scalable FPGA architecture for regular and irregular LDPC decoding F Verdier, D Declercq IEEE Transactions on Communications 54 (7), 1215-1223, 2006 | 24 | 2006 |
| Using high-level RTOS models for HW/SW embedded architecture exploration: case study on mobile robotic vision F Verdier, B Miramond, M Maillard, E Huck, T Lefebvre EURASIP Journal on Embedded Systems 2008, 1-17, 2008 | 21 | 2008 |
| Toward unsupervised human activity recognition on microcontroller units PE Novac, A Castagnetti, A Russo, B Miramond, A Pegatoquet, F Verdier 2020 23rd Euromicro Conference on Digital System Design (DSD), 542-550, 2020 | 20 | 2020 |
| OveRSoC: a framework for the exploration of RTOS for RSoC platforms B Miramond, E Huck, F Verdier, A Benkhelifa, B Granado, T Lefebvre, ... International Journal of Reconfigurable Computing 2009 (1), 450607, 2009 | 20 | 2009 |
| A true decentralized implementation based on iot and blockchain: a vehicle accident use case L Gerrits, R Kromes, F Verdier 2020 International Conference on Omni-layer Intelligent Systems (COINS), 1-6, 2020 | 18 | 2020 |
| Optimization of LDPC finite precision belief propagation decoding with discrete density evolution D Declercq, F Verdier 3rd International Symposium on Turbo Codes and Related Topics Brest, France, 2003 | 18 | 2003 |
| A methodology for inserting clock-management strategies in transaction-level models of systemon-chips H Affes, M Auguin, F Verdier, A Pegatoquet 2015 Forum on Specification and Design Languages (FDL), 1-7, 2015 | 17 | 2015 |
| Energy saving in a wireless sensor network by data prediction by using self-organized maps A Russo, F Verdier, B Miramond Procedia computer science 130, 1090-1095, 2018 | 15 | 2018 |
| Energy consumption minimization on LoRaWAN sensor network by using an Artificial Neural Network based application R Kromes, A Russo, B Miramond, F Verdier 2019 IEEE Sensors Applications Symposium (SAS), 1-6, 2019 | 14 | 2019 |
| System-level modelling for reconfigurable SoCs I Benkermi, A Benkhelifa, D Chillet, S Pillement, JC Prévotet, F Verdier Synthesis 1 (T2), T3, 2005 | 14 | 2005 |
| An ESL framework for low power architecture design space exploration H Affes, AB Ameur, M Auguin, F Verdier, C Barnes 2016 IEEE 27th International Conference on Application-specific Systems …, 2016 | 13 | 2016 |
