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Lan Peng
Lan Peng
在 imec.be 的电子邮件经过验证
标题
引用次数
引用次数
年份
Scalable, sub 2μm pitch, Cu/SiCN to Cu/SiCN hybrid wafer-to-wafer bonding technology
E Beyne, SW Kim, L Peng, N Heylen, J De Messemaeker, OO Okudur, ...
2017 IEEE International Electron Devices Meeting (IEDM), 32.4. 1-32.4. 4, 2017
1452017
Ultra-fine pitch 3D integration using face-to-face hybrid wafer bonding combined with a via-middle through-silicon-via process
SW Kim, M Detalle, L Peng, P Nolmans, N Heylen, D Velenis, A Miller, ...
2016 IEEE 66th Electronic Components and Technology Conference (ECTC), 1179-1185, 2016
592016
Influence of composition of SiCN as interfacial layer on plasma activated direct bonding
F Inoue, L Peng, S Iacovo, A Phommahaxay, P Verdonck, J Meersschaut, ...
ECS Journal of Solid State Science and Technology 8 (6), P346, 2019
542019
Three-dimensional wafer stacking using Cu–Cu bonding for simultaneous formation of electrical, mechanical, and hermetic bonds
CS Tan, L Peng, J Fan, H Li, S Gao
IEEE Transactions on Device and Materials Reliability 12 (2), 194-200, 2012
472012
High-density 3-D interconnect of Cu–Cu contacts with enhanced contact resistance by self-assembled monolayer (SAM) passivation
L Peng, H Li, DF Lim, S Gao, CS Tan
IEEE Transactions on Electron Devices 58 (8), 2500-2506, 2011
422011
Advances in sicn-sicn bonding with high accuracy wafer-to-wafer (w2w) stacking technology
L Peng, SW Kim, S Iacovo, F Inoue, A Phommahaxay, E Sleeckx, ...
2018 IEEE International Interconnect Technology Conference (IITC), 179-181, 2018
382018
First Demonstration of 3D stacked Finfets at a 45nm fin pitch and 110nm gate pitch technology on 300mm wafers
A Vandooren, J Franco, Z Wu, B Parvais, W Li, L Witters, A Walke, L Peng, ...
2018 IEEE International Electron Devices Meeting (IEDM), 7.1. 1-7.1. 4, 2018
352018
Ultrafine Pitch (6) of Recessed and Bonded Cu–Cu Interconnects by Three-Dimensional Wafer Stacking
L Peng, L Zhang, J Fan, HY Li, DF Lim, CS Tan
IEEE electron device letters 33 (12), 1747-1749, 2012
352012
Low temperature Cu-to-Cu bonding for wafer-level hermetic encapsulation of 3D microsystems
J Fan, DF Lim, L Peng, KH Li, CS Tan
Electrochemical and solid-state letters 14 (11), H470, 2011
352011
Permanent wafer bonding in the low temperature by using various plasma enhanced chemical vapour deposition dielectrics
SW Kim, L Peng, A Miller, G Beyer, E Beyne, CS Lee
2015 International 3D Systems Integration Conference (3DIC), TS7. 2.1-TS7. 2.4, 2015
342015
Influence of Si wafer thinning processes on (sub) surface defects
F Inoue, A Jourdain, L Peng, A Phommahaxay, J De Vos, KJ Rebibis, ...
Applied Surface Science 404, 82-87, 2017
332017
Enabling ultra-thin die to wafer hybrid bonding for future heterogeneous integrated systems
A Phommahaxay, S Suhard, P Bex, S Iacovo, J Slabbekoorn, F Inoue, ...
2019 IEEE 69th Electronic Components and Technology Conference (ECTC), 607-613, 2019
322019
3D sequential stacked planar devices on 300 mm wafers featuring replacement metal gate junction-less top devices processed at 525° C with improved reliability
A Vandooren, J Franco, B Parvais, Z Wu, L Witters, A Walke, W Li, L Peng, ...
2018 IEEE Symposium on VLSI Technology, 69-70, 2018
272018
Wafer-level hermetic packaging of 3D microsystems with low-temperature Cu-to-Cu thermo-compression bonding and its reliability
J Fan, L Peng, KH Li, CS Tan
Journal of micromechanics and microengineering 22 (10), 105004, 2012
242012
Thermal reliability of fine pitch Cu-Cu bonding with self assembled monolayer (SAM) passivation for Wafer-on-Wafer 3D-Stacking
L Peng, HY Li, DF Lim, S Gao, CS Tan
2011 IEEE 61st Electronic Components and Technology Conference (ECTC), 22-26, 2011
242011
3-D sequential stacked planar devices featuring low-temperature replacement metal gate junctionless top devices with improved reliability
A Vandooren, J Franco, B Parvais, Z Wu, L Witters, A Walke, W Li, L Peng, ...
IEEE Transactions on Electron Devices 65 (11), 5165-5171, 2018
202018
Wafer-on-wafer stacking by bumpless Cu–Cu bonding and its electrical characteristics
CS Tan, L Peng, HY Li, DF Lim, S Gao
IEEE electron device letters 32 (7), 943-945, 2011
182011
Sequential 3D: Key integration challenges and opportunities for advanced semiconductor scaling
A Vandooren, L Witters, J Franco, A Mallik, B Parvais, Z Wu, A Walke, ...
2018 International Conference on IC Design & Technology (ICICDT), 145-148, 2018
172018
Origin of Voids at the SiO2/SiO2 and SiCN/SiCN Bonding Interface Using Positron Annihilation Spectroscopy and Electron Spin Resonance
F Nagano, F Inoue, A Phommahaxay, L Peng, F Chancerel, H Naser, ...
ECS Journal of Solid State Science and Technology 12 (3), 033002, 2023
152023
Characterization of bonding activation sequences to enable ultra-low Cu/SiCN wafer level hybrid bonding
S Iacovo, L Peng, F Nagano, T Uhrmann, J Burggraf, A Fehkührer, ...
2021 IEEE 71st Electronic Components and Technology Conference (ECTC), 2097-2104, 2021
152021
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