| The EPFL logic synthesis libraries M Soeken, H Riener, W Haaswijk, E Testa, B Schmitt, G Meuli, F Mozafari, ... arXiv preprint arXiv:1805.05121, 2018 | 123 | 2018 |
| Three-input gates for logic synthesis DS Marakkalage, E Testa, H Riener, A Mishchenko, M Soeken, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020 | 21 | 2020 |
| Majority-based Design Flow for AQFP Superconducting Family G Meuli, V Possani, R Singh, SY Lee, AT Calvino, DS Marakkalage, ... 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 34-39, 2022 | 12 | 2022 |
| Optimizing Adiabatic Quantum-Flux-Parametron (AQFP) Circuits using an Exact Database DS Marakkalage, H Riener, G De Micheli 2021 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), 1-6, 2021 | 11 | 2021 |
| Fanout-Bounded Logic Synthesis for Emerging Technologies DS Marakkalage, G De Micheli IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023 | 3 | 2023 |
| Fanout-Bounded Logic Synthesis for Emerging Technologies-A Top-Down Approach DS Marakkalage, G De Micheli 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2023 | 3 | 2023 |
| Optimizing Adiabatic Quantum-Flux-Parametron (AQFP) Circuits using Exact Methods DS Marakkalage, H Riener, G De Micheli Proceedings of IWLS, 2021 | 2 | 2021 |
| Garbled Circuits Reimagined: Logic Synthesis Unleashes Efficient Secure Computation M Yu, DS Marakkalage, G De Micheli Cryptography 7 (4), 61, 2023 | 1 | 2023 |
| Technology Mapping for Beyond-CMOS Circuitry with Unconventional Cost Functions DS Marakkalage, M Walter, SY Lee, R Wille, G De Micheli International Logic Synthesis Workshop (IWLS), 2023 | 1 | 2023 |
| Technology-Aware Logic Synthesis for Superconducting Electronics R Bairamkulov, SY Lee, AT Calvino, DS Marakkalage, M Yu, G De Micheli 2024 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2024 | | 2024 |
| Scalable Sequential Optimization Under Observability Don't Cares DS Marakkalage, E Testa, WL Neto, A Mishchenko, G De Micheli, ... 2024 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2024 | | 2024 |
| Fanout-Bounded Logic Synthesis for Emerging Technologies - A Top-Down Approach DS Marakkalage, G De Micheli IWLS, 2022 | | 2022 |
| Octagon Abstract Interpreter J Boillot, O Desrentes, SY Lee, DS Marakkalage | | |
Giovanni De MicheliEPFL, Stanford在 epfl.ch 的电子邮件经过验证
