| Optimized power supply for an electronic system JLV Zerbe, J Kim, YU Frans, HM Nguyen US Patent 8,362,642, 2013 | 263 | 2013 |
| Optimized power supply for an electronic system JLV Zerbe, J Kim, YU Frans, HM Nguyen US Patent 8,362,642, 2013 | 263 | 2013 |
| Self-biased high-bandwidth low-jitter 1-to-4096 multiplier clock generator PLL JG Maneatis, J Kim, I McClatchie, J Maxey, M Shankaradas IEEE Journal of Solid-State Circuits 38 (11), 1795-1803, 2003 | 241 | 2003 |
| In Vivo Self‐Powered Wireless Transmission Using Biocompatible Flexible Energy Harvesters DH Kim, HJ Shin, H Lee, CK Jeong, H Park, GT Hwang, HY Lee, DJ Joe, ... Advanced Functional Materials 27 (25), 2017 | 224 | 2017 |
| Adaptive bandwidth DLLs and PLLs using regulated supply CMOS buffers S Sidiropoulos, D Liu, J Kim, G Wei, M Horowitz VLSI Circuits, 2000. Digest of Technical Papers. 2000 Symposium on, 124-127, 2000 | 220 | 2000 |
| Adaptive supply serial links with sub-1-V operation and per-pin clock recovery J Kim, MA Horowitz IEEE Journal of Solid-State Circuits 37 (11), 1403-1413, 2002 | 191 | 2002 |
| Replica compensated linear regulators for supply-regulated phase-locked loops E Alon, J Kim, S Pamarti, K Chang, M Horowitz IEEE Journal of Solid-State Circuits 41 (2), 413-424, 2006 | 189 | 2006 |
| A variable-frequency parallel I/O interface with adaptive power-supply regulation GY Wei, J Kim, D Liu, S Sidiropoulos, MA Horowitz IEEE Journal of Solid-State Circuits 35 (11), 1600-1610, 2000 | 184 | 2000 |
| Simulation and analysis of random decision errors in clocked comparators J Kim, BS Leibowitz, J Ren, CJ Madden IEEE Transactions on Circuits and Systems I: Regular Papers 56 (8), 1844-1857, 2009 | 182 | 2009 |
| Memory-centric system interconnect design with hybrid memory cubes G Kim, J Kim, JH Ahn, J Kim Proceedings of the 22nd international conference on Parallel architectures …, 2013 | 181 | 2013 |
| An efficient digital sliding controller for adaptive power-supply regulation J Kim, MA Horowitz IEEE Journal of solid-state circuits 37 (5), 639-647, 2002 | 145 | 2002 |
| Reduction of pump current mismatch in charge-pump PLL MS Hwang, JH Kim, DK Jeong Electronics letters 45 (3), 135-136, 2009 | 139 | 2009 |
| A Reconfigurable Rectified Flexible Energy Harvester via Solid‐State Single Crystal Grown PMN–PZT GT Hwang, J Yang, SH Yang, HY Lee, M Lee, DY Park, JH Han, SJ Lee, ... Advanced Energy Materials 5 (10), 2015 | 131 | 2015 |
| Multi-gigabit-rate clock and data recovery based on blind oversampling J Kim, DK Jeong IEEE Communications Magazine 41 (12), 68-74, 2003 | 106 | 2003 |
| A 20-GHz phase-locked loop for 40-Gb/s serializing transmitter in 0.13-μm CMOS J Kim, JK Kim, BJ Lee, N Kim, DK Jeong, W Kim IEEE Journal of Solid-State Circuits 41 (4), 899-908, 2006 | 98 | 2006 |
| Design of CMOS adaptive-bandwidth PLL/DLLs: a general approach J Kim, MA Horowitz, GY Wei IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 2003 | 98 | 2003 |
| A single-inductor, multiple-channel current-balancing LED driver for display backlight applications HC Kim, CS Yoon, DK Jeong, J Kim IEEE Transactions on Industry Applications 50 (6), 4077-4081, 2014 | 91 | 2014 |
| Signaling with superimposed differential-mode and common-mode signals Q Lin, HC Lee, J Kim, BS Leibowitz, JL Zerbe, J Ren US Patent 8,279,976, 2012 | 80 | 2012 |
| Receiver with enhanced clock and data recovery HC Lee, B Leibowitz, J Kim, J Savoj US Patent 8,929,496, 2015 | 79 | 2015 |
| Receiver with enhanced clock and data recovery HC Lee, B Leibowitz, J Kim, J Savoj US Patent 8,929,496, 2015 | 79 | 2015 |
Deog-Kyoon JeongSeoul National University, Department of Electrical and Computer Engineering在 snu.ac.kr 的电子邮件经过验证
