| Short‐Term Power Prediction of Building Integrated Photovoltaic (BIPV) System Based on Machine Learning Algorithms R Kabilan, V Chandran, J Yogapriya, A Karthick, PP Gandhi, ... International Journal of Photoenergy 2021 (1), 5582418, 2021 | 76 | 2021 |
| A novel low offset low power CMOS dynamic comparator PP Gandhi, NM Devashrayee Analog Integrated Circuits and Signal Processing 96, 147-158, 2018 | 42 | 2018 |
| Implementation of CMOS charge sharing dynamic latch comparator in 130nm and 90nm technologies DN Kapadia, PP Gandhi 2013 IEEE Conference on Information & Communication Technologies, 16-20, 2013 | 18 | 2013 |
| FPGA Implementation of Artificial Neural Network HH Makwana, DJ Shah, PP Gandhi International Journal of Emerging Technology and Advanced Engineering 3 (1 …, 2013 | 9 | 2013 |
| Four quadrant analog multiplier with VCVS in deep-submicron technology NB Modi, PP Gandhi 2013 IEEE Conference on Information & Communication Technologies, 1091-1094, 2013 | 8 | 2013 |
| Voltage controlled delay line with PFD for delay locked loop in CMOS 90nm technology KI Patel, PP Gandhi, ND Patel, J Prajapati International Journal of Research in Electronics and Communication …, 2014 | 7 | 2014 |
| Design & Simulation of Low Power High Speed CMOS Comparator in Deep Sub-micron Technology PP Gandhi M. Tech thesis, Dept. of electronics & communication Eng. Nirma University, 2010 | 7 | 2010 |
| Differential double tail dynamic CMOS voltage comparator PP Gandhi, NM Devashrayee 2017 International Conference on Intelligent Communication and Computational …, 2017 | 5 | 2017 |
| Design and implementation of numerical controlled oscillator on FPGA NA Ranabhatt, S Agarwal, RK Bhattar, PP Gandhi 2013 Tenth International Conference on Wireless and Optical Communications …, 2013 | 5 | 2013 |
| Design and comparative analysis of differential current sensing comparator in deep sub—Micron region DN Kapadia, PP Gandhi 2013 IEEE Conference on Information & Communication Technologies, 21-25, 2013 | 4 | 2013 |
| Characterization of CMOS Four Quadrant Analog Multiplier NB Modi, PP Gandhi International Journal of Engineering Research and Applications, 1276-1281, 2013 | 4 | 2013 |
| A 1.8 V 8-bit 100MS/s Pipeline ADC in 0.18 µm CMOS Technology D Chaudhari, P Gandhi International Journal of Science and Research (IJSR) 3 (5), 671-674, 2014 | 3 | 2014 |
| Design and Simulation of High Speed CMOS Differential Current Sensing Comparator in 0.35 µm and 0.25 µm 1 Technologies DN Kapadia, PP Gandhi International journal of Electronics and Communication Engineering …, 2012 | 3 | 2012 |
| Design and analysis of phase-locked loop and performance parameters ND Patel, GR Modi, PP Gandhi, AP Naik Int J Microelectron Eng (IJME) 3 (1), 2, 2017 | 2 | 2017 |
| High performance CMOS voltage comparator PP Gandhi, NM Devashrayee 2013 Nirma University International Conference on Engineering (NUiCONE), 1-5, 2013 | 2 | 2013 |
| RTL Design and Implementation of BPSK Modulation at Low Bit Rate NA Ranabhatt, S Agarwal, PP Gandhi International Journal of Engineering Research & Technology (IJERT) 2 (2), 1-6, 2013 | 2 | 2013 |
| Design and Implementation of 1-bit Pipeline ADC in 0.18 um CMOS Technology BD Chaudhari, PP Gandh International Journal of Engineering Sciences & Research Technology, 1367-1371, 2014 | 1 | 2014 |
| Enhancement of Breakdown Voltage in SOI MOSFET Using Buried p-Type Silicon S MG, PP Gandhi, K Cengiz | | 2021 |
| Enhancement of Breakdown Voltage in SOI MOSFET Using Buried p-Type Silicon M Deivakani, MG Sumithra, P Anitha, P Jenopaul, PP Gandhi, K Cengiz | | 2021 |
| Research Article Short-Term Power Prediction of Building Integrated Photovoltaic (BIPV) System Based on Machine Learning Algorithms R Kabilan, V Chandran, J Yogapriya, A Karthick, PP Gandhi, ... | | 2021 |
Prof. (Dr.) Niranjan M DevashrayeeProfessor of Electronics & Communication Engineering在 nirmauni.ac.in 的电子邮件经过验证
