Semiconductor device package and method WY Lin, MC Yew, CY Hong, PY Lin, KC Liu US Patent 8,941,248, 2015 | 80 | 2015 |
Integrated circuit package with multiple heat dissipation paths PY Lin, CB Hwang US Patent 6,188,578, 2001 | 73 | 2001 |
Multilayer RDL interposer for heterogeneous device and module integration YH Lin, MC Yew, SM Chen, MS Liu, P Kavle, TM Lai, CT Yu, FC Hsu, ... 2019 IEEE 69th Electronic Components and Technology Conference (ECTC), 931-936, 2019 | 62 | 2019 |
Electrical connection for chip scale packaging MC Yew, FJ Li, PY Lin, CJ Cheng, HM Yu US Patent 8,624,392, 2014 | 47 | 2014 |
Lid design for reliability enhancement in flip chip package WY Lin, PY Lin, TS Lin, KC Chang, SY Wang US Patent 8,976,529, 2015 | 34 | 2015 |
Reliability Performance of Advanced Organic Interposer (CoWoS®-R) Packages PY Lin, MC Yew, SS Yeh, SM Chen, CH Lin, CS Chen, CC Hsieh, YJ Lu, ... 2021 IEEE 71st Electronic Components and Technology Conference (ECTC), 723-728, 2021 | 33 | 2021 |
3D heterogeneous integration with multiple stacking fan-out package FC Hsu, J Lin, SM Chen, PY Lin, J Fang, JH Wang, SP Jeng 2018 IEEE 68th Electronic Components and Technology Conference (ECTC), 337-342, 2018 | 32 | 2018 |
Three dimensional integrated circuit (3DIC) having a thermally enhanced heat spreader embedded in a substrate PY Lin, WY Lin, S Ter LEU, MC Yew, SS Yeh US Patent 9,721,868, 2017 | 28 | 2017 |
Side exhaust heat dissipation module CT Chung, PY Lin US Patent 6,711,016, 2004 | 28 | 2004 |
3D packages and methods for forming the same MC Yew, WY Lin, FJ Li, PY Lin, KC Liu US Patent 9,252,076, 2016 | 27 | 2016 |
Integrated fan-out package on package structure and methods of forming same WY Lin, HW Liu, PY Lin, CL Huang, ST Leu, S Jeng US Patent 9,881,908, 2018 | 26 | 2018 |
Electrical connection for chip scale packaging MC Yew, WY Lin, FJ Li, PY Lin US Patent 9,548,281, 2017 | 23 | 2017 |
Semiconductor device package and method MC Yew, FJ Li, WY Lin, PY Lin, KC Liu US Patent 8,901,732, 2014 | 22 | 2014 |
Warpage modeling and characterization of the viscoelastic relaxation for cured molding process in fan-out packages SS Yeh, PY Lin, KC Lee, JH Wang, WY Lin, MC Yew, PC Lai, ST Leu, ... 2017 IEEE 67th Electronic Components and Technology Conference (ECTC), 841-846, 2017 | 21 | 2017 |
Heat dissipation module CT Chung, CC Cheng, PY Lin US Patent 6,819,564, 2004 | 20 | 2004 |
Semiconductor package and method for forming the same CH Wang, PY Lin, FC Hsu, S Jeng, WY Lin, SS Yeh US Patent 11,011,447, 2021 | 19 | 2021 |
Package on packaging structure and methods of making same WY Lin, MC Yew, PY Lin, JR Lu, JY Wu US Patent 8,946,888, 2015 | 18 | 2015 |
Fan-out packages and methods of forming the same PH Tsai, MC Yew, CK Hsu, S Jeng, PY Chuang, ML Lin, ST Hung, PY Lin US Patent 11,164,754, 2021 | 17 | 2021 |
Warpage modeling of ultra-thin packages based on chemical shrinkage and cure-dependent viscoelasticity of molded underfill PY Lin, S Lee IEEE Transactions on Device and Materials Reliability 20 (1), 67-73, 2019 | 17 | 2019 |
Thermally enhanced heat spreader for flip chip packaging PY Lin, WY Lin US Patent 8,970,029, 2015 | 16 | 2015 |