| Energy-efficient XNOR-free in-memory BNN accelerator with input distribution regularization H Kim, H Oh, JJ Kim Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020 | 20 | 2020 |
| A Capacitive Computing-In-Memory Circuit with Low Input Loading SRAM Bitcell and Adjustable ADC Input Range E Kim, H Oh, N Kang, J Park, JJ Kim IEEE Transactions on Circuits and Systems II: Express Briefs 70 (9), 3268-3272, 2023 | 12* | 2023 |
| Energy-efficient in-memory binary neural network accelerator design based on 8T2C SRAM cell H Oh, H Kim, D Ahn, J Park, Y Kim, I Lee, JJ Kim IEEE Solid-State Circuits Letters 5, 70-73, 2022 | 10 | 2022 |
| Mapping binary ResNets on computing-in-memory hardware with low-bit ADCs Y Kim, H Kim, J Park, H Oh, JJ Kim 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), 856-861, 2021 | 7 | 2021 |
| Maximizing parallel activation of word-lines in MRAM-based binary neural network accelerators D Ahn, H Oh, H Kim, Y Kim, JJ Kim IEEE Access 9, 141961-141969, 2021 | 6 | 2021 |
| Single RRAM cell-based in-memory accelerator architecture for binary neural networks H Oh, H Kim, N Kang, Y Kim, J Park, JJ Kim 2021 IEEE 3rd International Conference on Artificial Intelligence Circuits …, 2021 | 6 | 2021 |
| Energy-efficient charge sharing-based 8T2C SRAM in-memory accelerator for binary neural networks in 28nm CMOS H Oh, H Kim, D Ahn, J Park, Y Kim, I Lee, JJ Kim 2021 IEEE Asian Solid-State Circuits Conference (A-SSCC), 1-3, 2021 | 3 | 2021 |
| In-Memory Neural Network Accelerator based on eDRAM Cell with Enhanced Retention Time I Lee, E Kim, N Kang, H Oh, JJ Kim 2023 60th ACM/IEEE Design Automation Conference (DAC), 1-6, 2023 | 1 | 2023 |
| TAIM: ternary activation in-memory computing hardware with 6T SRAM array N Kang, H Kim, H Oh, JJ Kim Proceedings of the 59th ACM/IEEE Design Automation Conference, 1081-1086, 2022 | 1 | 2022 |
