| Pipelined Radix-Feedforward FFT Architectures M Garrido, J Grajal, MA Sanchez, O Gustafsson IEEE Transactions on Very Large Scale Integration (VLSI) Systems 21 (1), 23-32, 2011 | 288 | 2011 |
| Implementing FFT-based digital channelized receivers on FPGA platforms MA Sanchez, M Garrido, M Lopez-Vallejo, J Grajal IEEE Transactions on Aerospace and Electronic Systems 44 (4), 1567-1585, 2008 | 107 | 2008 |
| Enhanced scaling-free CORDIC FJ Jaime, MA Sánchez, J Hormigo, J Villalba, EL Zapata IEEE Transactions on Circuits and Systems I: Regular Papers 57 (7), 1654-1662, 2010 | 98 | 2010 |
| Real-time low-complexity automatic modulation classifier for pulsed radar signals V Iglesias, J Grajal, P Royer, MA Sanchez, M Lopez-Vallejo, ... IEEE Transactions on Aerospace and Electronic Systems 51 (1), 108-126, 2015 | 56 | 2015 |
| Implementation of a real-time spectrum analyzer on FPGA platforms V Iglesias, J Grajal, MA Sánchez, M López-Vallejo IEEE Transactions on Instrumentation and Measurement 64 (2), 338-355, 2014 | 53 | 2014 |
| A 4096-point radix-4 memory-based FFT using DSP slices M Garrido, MÁ Sánchez, ML López-Vallejo, J Grajal IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (1), 375-379, 2016 | 50 | 2016 |
| Digital channelised receivers on FPGAs platforms MA Sanchez, M Garrido, M López-Vallejo, J Grajal, C López-Barrio IEEE International Radar Conference, 2005., 816-821, 2005 | 41 | 2005 |
| Pigmalión en la escuela M Sánchez, M López Sánchez., M y López, M.(comps.) Pygmalión en la escuela, 2005 | 27 | 2005 |
| Real time FPGA implementation of an automatic modulation classifier for electronic warfare applications J Grajal, O Yeste-Ojeda, MA Sanchez, M Garrido, M López-Vallejo 2011 19th European Signal Processing Conference, 1514-1518, 2011 | 25 | 2011 |
| Real-time radar pulse parameter extractor V Iglesias, J Grajal, O Yeste-Ojeda, M Garrido, MA Sánchez, ... 2014 IEEE Radar Conference, 0371-0375, 2014 | 20 | 2014 |
| Area-efficient linear regression architecture for real-time signal processing on FPGAs P Royer, MA Sánchez, M López-Vallejo, CA López Proc. 26th Conf. DCIS, 1-6, 2011 | 12 | 2011 |
| Implementing the FFT algorithm on FPGA platforms: A comparative study of parallel architectures MA Sánchez, M Garrido, ML López, J Grajal Int. Conf. Design Circuits Integr., Syst, 2004 | 10 | 2004 |
| Automated design space exploration of FPGA-based FFT architectures based on area and power estimation MA Sanchez, M Garrido, ML Vallejo, C López-Barrio 2006 IEEE International Conference on Field Programmable Technology, 127-134, 2006 | 8 | 2006 |
| Experimental methodology for power characterization of FPGAs I Herrera-Alzu, MA Sanchez, M López-Vallejo, P Echeverria 2008 15th IEEE International Conference on Electronics, Circuits and Systems …, 2008 | 6 | 2008 |
| Designing highly parameterized hardware using xHDL MA Sánchez, P Echeverría, F Mansilla, M López-Vallejo 2008 Forum on Specification, Verification and Design Languages, 78-83, 2008 | 3 | 2008 |
| Development of a Standard Single Floating-Point Library and its Encapsulation for Reuse P Echeverrıa, MA Sánchez, M López-Vallejo, CL Barrio p99. pdf in DCIS2009. unizar. es/FILES/CR2.(IJCSIS) International Journal of …, 2012 | 1 | 2012 |
| High-speed algorithms and architectures for range reduction computation FJ Jaime, MA Sánchez, J Hormigo, J Villalba, EL Zapata IEEE transactions on very large scale integration (VLSI) systems 19 (3), 512-516, 2009 | 1 | 2009 |
| Administración estratégica y política de negocios TL Wheelen, JD Hunger, MÁ Sánchez Pearson Educación, 2007 | | 2007 |
| Escuela Técnica Superior de Ingenieros de Caminos, Canales y Puertos MÁV SANCHEZ Obtenido de Cátedra de Topografía: Introducción a la fotogrametría, 2006 | | 2006 |
| Algorithms, Artificial Intelligence, SOFT Computing and Informatics V Iglesias, J Grajal, MA Sánchez, M López-Vallejo, DA Humphreys, ... | | |
