| Convolutional memory integrity DM Durham, S Chhabra, ME Kounavis, S Deutsch, KS Grewal, JF Cihula, ... US Patent 10,585,809, 2020 | 117 | 2020 |
| TSV defects and TSV-induced circuit failures: The third dimension in test and design-for-test K Chakrabarty, S Deutsch, H Thapliyal, F Ye 2012 IEEE International Reliability Physics Symposium (IRPS), 5F. 1.1-5F. 1.12, 2012 | 84 | 2012 |
| Contactless pre-bond TSV test and diagnosis using ring oscillators and multiple voltage levels S Deutsch, K Chakrabarty IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2014 | 57 | 2014 |
| Non-invasive pre-bond TSV test using ring oscillators and multiple voltage levels S Deutsch, K Chakrabarty 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2013 | 53 | 2013 |
| Memory integrity with error detection and correction DM Durham, S Chhabra, S Deutsch, M Long, ATN Trivedi US Patent 9,990,249, 2018 | 52 | 2018 |
| DfT architecture and ATPG for Interconnect tests of JEDEC Wide-I/O memory-on-logic die stacks S Deutsch, B Keller, V Chickermane, S Mukherjee, N Sood, SK Goel, ... 2012 IEEE International Test Conference, 1-10, 2012 | 50 | 2012 |
| Cryptographic capability computing M LeMay, J Rakshit, S Deutsch, DM Durham, S Ghosh, A Nori, J Gaur, ... MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture …, 2021 | 38 | 2021 |
| Automation of 3D-DfT insertion S Deutsch, V Chickermane, B Keller, S Mukherjee, M Konijnenburg, ... 2011 Asian Test Symposium, 395-400, 2011 | 29 | 2011 |
| Contactless pre-bond TSV fault diagnosis using duty-cycle detectors and ring oscillators S Deutsch, K Chakrabarty 2015 IEEE International Test Conference (ITC), 1-10, 2015 | 24 | 2015 |
| Massive signal tracing using on-chip DRAM for in-system silicon debug S Deutsch, K Chakrabarty 2014 International Test Conference, 1-10, 2014 | 22 | 2014 |
| Test and design-for-testability solutions for 3D integrated circuits K Chakrabarty, M Agrawal, S Deutsch, B Noia, R Wang, F Ye IPSJ Transactions on System and LSI Design Methodology 7, 56-73, 2014 | 22 | 2014 |
| Memory write for ownership access in a core ME Kounavis, S Ghosh, S Deutsch, M LeMay, DM Durham US Patent App. 16/862,022, 2020 | 21 | 2020 |
| Cryptographic isolation of memory compartments in a computing environment ME Kounavis, S Ghosh, S Deutsch, M LeMay, DM Durham US Patent 11,354,423, 2022 | 20 | 2022 |
| Methods and arrangements for implicit integrity M Kounavis, D Durham, S Deutsch, S Komijani, A Das US Patent 10,929,527, 2021 | 19 | 2021 |
| Cryptographic system memory management DM Durham, R Agarwal, S Chhabra, S Deutsch, KS Grewal, IT Schoinas US Patent 10,594,491, 2020 | 19 | 2020 |
| Techniques for compression memory coloring DM Durham, S Deutsch, S Komijani, ATN Trivedi, S Chhabra US Patent 10,387,305, 2019 | 19 | 2019 |
| Memory integrity violation analysis method and apparatus S Deutsch, KS Grewal, ME Kounavis US Patent 10,261,854, 2019 | 18 | 2019 |
| Software-based self-test and diagnosis using on-chip memory S Deutsch, K Chakrabarty US Patent 9,864,007, 2018 | 17 | 2018 |
| K-cipher: A low latency, bit length parameterizable cipher M Kounavis, S Deutsch, S Ghosh, D Durham 2020 IEEE Symposium on Computers and Communications (ISCC), 1-7, 2020 | 15 | 2020 |
| Vesuvius-3D: a 3D-DfT demonstrator EJ Marinissen, B De Wachter, S O'Loughlin, S Deutsch, C Papameletis, ... 2014 International Test Conference, 1-10, 2014 | 15 | 2014 |
