| Formation of integrated circuit structure using one or more silicon layers for implantation and out-diffusion in formation of defect-free source/drain regions and also for … S Aronowitz, H Puchner, RA Kapre, JP Kimball US Patent 6,331,468, 2001 | 258 | 2001 |
| Integration of non-volatile charge trap memory devices and logic CMOS devices WWC Koutny Jr, S Geha, I Kouznetsov, K Ramkumar, FB Jenne, S Levy, ... US Patent 8,093,128, 2012 | 111 | 2012 |
| Monolayer chemical beam etching: Reverse molecular beam epitaxy WT Tsang, TH Chiu, RM Kapre Applied physics letters 63 (25), 3500-3502, 1993 | 66 | 1993 |
| Integration of non-volatile charge trap memory devices and logic CMOS devices K Ramkumar, R Kapre, J Warren US Patent 8,143,129, 2012 | 51 | 2012 |
| Elimination of single event latchup in 90nm SRAM technologies H Puchner, R Kapre, S Sharifzadeh, J Majjiga, R Chao, D Radaelli, ... 2006 IEEE International Reliability Physics Symposium Proceedings, 721-722, 2006 | 50 | 2006 |
| Control of lasing wavelength in distributed feedback lasers by angling the active stripe with respect to the grating WT Tsang, RM Kapre, RA Logan, T Tanbun-Ek IEEE photonics technology letters 5 (9), 978-980, 1993 | 48 | 1993 |
| Process for forming thin gate oxide with enhanced reliability by nitridation of upper surface of gate of oxide to form barrier of nitrogen atoms in upper surface region of gate … S Aronowitz, J Haywood, JP Kimball, H Puchner, RM Kapre, N Eib US Patent 6,413,881, 2002 | 43 | 2002 |
| Reactive chemical beam etching of InP inside a chemical beam epitaxial growth chamber using phosphorus trichloride WT Tsang, R Kapre, PF Sciortino Jr Applied physics letters 62 (17), 2084-2086, 1993 | 43 | 1993 |
| Realization and analysis of GaAs/AlAs/In0.1Ga0.9As based resonant tunneling diodes with high peak‐to‐valley ratios at room temperature R Kapre, A Madhukar, K Kaviani, S Guha, KC Rajkumar Applied physics letters 56 (10), 922-924, 1990 | 42 | 1990 |
| Growth of InxGa1−xAs on patterned GaAs(100) substrates S Guha, A Madhukar, K Kaviani, R Kapre Journal of Vacuum Science & Technology B: Microelectronics Processing and …, 1990 | 37 | 1990 |
| Method of reducing silicon oxynitride gate insulator thickness in some transistors of a hybrid integrated circuit to obtain increased differential in gate insulator thickness … A Kamath, R Patel, RM Kapre US Patent 6,521,549, 2003 | 36 | 2003 |
| Alignment-relaxed 1.55 µm multiquantum well lasers fabricated using standard buried heterostructure laser processes MH Shih, FS Choa, RM Kapre, WT Tsang, RA Logan, SNG Chu Electronics Letters 31 (13), 1058-1060, 1995 | 35 | 1995 |
| Highly strained GaAs/InGaAs/AlAs resonant tunneling diodes with simultaneously high peak current densities and peak‐to‐valley ratios at room temperature RM Kapre, A Madhukar, S Guha Applied physics letters 58 (20), 2255-2257, 1991 | 28 | 1991 |
| In-situ dry etching of InP using phosphorus trichloride and regrowth inside a chemical beam epitaxial growth chamber WT Tsang, R Kapre, PF Sciortino Jr Journal of crystal growth 136 (1-4), 42-49, 1994 | 24 | 1994 |
| Buried channel devices and a process for their fabrication simultaneously with surface channel devices to produce transistors and capacitors with multiple electrical gate oxides RM Kapre, T Hsiao, Y Wang, K Min US Patent 6,747,318, 2004 | 22 | 2004 |
| Realization of low defect density, ultrathick, strained InGaAs/GaAs multiple quantum well structures via growth on patterned GaAs (100) substrates A Madhukar, KC Rajkumar, L Chen, S Guha, K Kaviani, R Kapre Applied physics letters 57 (19), 2007-2009, 1990 | 20 | 1990 |
| In-memory computing array using 40nm multibit SONOS achieving 100 TOPS/W energy efficiency for deep neural network edge inference accelerators V Agrawal, V Prabhakar, K Ramkumar, L Hinh, S Saha, S Samanta, ... 2020 IEEE International Memory Workshop (IMW), 1-4, 2020 | 17 | 2020 |
| Memory cell array latchup prevention RM Kapre, S Sharifzadeh US Patent 7,773,442, 2010 | 16 | 2010 |
| A novel low cost 65nm CMOS process architecture with self aligned isolation and W cladded source/drain A Blosse, K Ramkumar, P Gopalan, CT Hsu, S Narayanan, G Narasimhan, ... IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004 …, 2004 | 16 | 2004 |
| High‐contrast optically bistable optoelectronic switch based on InGaAs/GaAs (100) asymmetric Fabry–Perot modulator, detector, and resonant tunneling diode L Chen, RM Kapre, K Hu, A Madhukar Applied physics letters 59 (13), 1523-1525, 1991 | 16 | 1991 |
