| A full-stack search technique for domain optimized deep learning accelerators D Zhang, S Huda, E Songhori, K Prabhu, Q Le, A Goldie, A Mirhoseini Proceedings of the 27th ACM International Conference on Architectural …, 2022 | 55 | 2022 |
| CHIMERA: A 0.92 TOPS, 2.2 TOPS/W edge AI accelerator with 2 MByte on-chip foundry resistive RAM for efficient training and inference M Giordano, K Prabhu, K Koul, RM Radway, A Gural, R Doshi, ZF Khan, ... 2021 symposium on VLSI circuits, 1-2, 2021 | 52 | 2021 |
| Social sector expenditures and human development: A study of Indian states KS Prabhu, S Chatterjee Department of Economic Analysis and Policy, Reserve Bank of India, 1993 | 44 | 1993 |
| CHIMERA: A 0.92-TOPS, 2.2-TOPS/W edge AI accelerator with 2-MByte on-chip foundry resistive RAM for efficient training and inference K Prabhu, A Gural, ZF Khan, RM Radway, M Giordano, K Koul, R Doshi, ... IEEE Journal of Solid-State Circuits 57 (4), 1013-1026, 2022 | 34 | 2022 |
| Ds6, deformation-aware semi-supervised learning: Application to small vessel segmentation with noisy training data S Chatterjee, K Prabhu, M Pattadkal, G Bortsova, C Sarasaen, F Dubost, ... Journal of Imaging 8 (10), 259, 2022 | 18 | 2022 |
| Ds6: Deformation-aware learning for small vessel segmentation with small, imperfectly labeled dataset S Chatterjee, K Prabhu, M Pattadkal, G Bortsova, F Dubost, H Mattern, ... arXiv preprint arXiv:2006.10802, 2020 | 7 | 2020 |
| Privacy-preserving inference on the edge: Mitigating a new threat model K Prabhu, B Jun, P Hu, Z Asgar, S Katti, P Warden Research symposium on tiny machine learning, 2021 | 5 | 2021 |
| Ultra-Dense 3D Physical Design Unlocks New Architectural Design Points with Large Benefits T Srimani, RM Radway, J Kim, K Prabhu, D Rich, C Gilardi, P Raina, ... 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2023 | 1 | 2023 |
| Report of the expert group on state enactments having a bearing on commercial banks lending to agriculture RK Talwar, GVK Rao, KPJ Prabhu, CD Datey, KG Rao, PH Abhyankar, ... Reserve Bank of India, Bombay, 1971 | 1 | 1971 |
| MINOTAUR: An Edge Transformer Inference and Training Accelerator with 12 MBytes On-Chip Resistive RAM and Fine-Grained Spatiotemporal Power Gating K Prabhu, RM Radway, Y Jeffrey, K Bartolone, M Giordano, ... 2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2024 | | 2024 |
| 8-bit Transformer Inference and Fine-tuning for Edge Accelerators J Yu, K Prabhu, Y Urman, RM Radway, E Han, P Raina Proceedings of the 29th ACM International Conference on Architectural …, 2024 | | 2024 |
| Predicting Power and Area for Chip Design K Prabhu, K Koul | | 2019 |
| Lakshminarayanan. G Lapira, Edzel R. S Mitra, SS Murthy, K Prabhu | | |
| Drowsiness Detection using Contactless Heart Rate Monitoring and Eye Tracking K Prabhu, B Barnhart, A Seetharaman | | |
| Drowsiness Detection using Contactless Heart Rate Monitoring and Eye Tracking B Barnhart, K Prabhu, A Seetharaman | | |
Robert M. RadwayPh.D. Candidate, Electrical Engineering, Stanford University在 stanford.edu 的电子邮件经过验证
