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Chi Yaqing(池雅庆)
Chi Yaqing(池雅庆)
国防科技大学
在 nudt.edu.cn 的电子邮件经过验证
标题
引用次数
引用次数
年份
Novel layout technique for N-hit single-event transient mitigation via source-extension
J Chen, S Chen, Y He, Y Chi, J Qin, B Liang, B Liu
IEEE Transactions on Nuclear Science 59 (6), 2859-2866, 2012
572012
Synthesis of carbon nanowall by plasma-enhanced chemical vapor deposition method
R Liu, Y Chi, L Fang, Z Tang, X Yi
Journal of nanoscience and nanotechnology 14 (2), 1647-1657, 2014
392014
Impact of circuit placement on single event transients in 65 nm bulk CMOS technology
H Yibai, C Shuming, C Jianjun, C Yaqing, L Bin, L Biwei, Q Junrui, ...
IEEE Transactions on Nuclear Science 59 (6), 2772-2777, 2012
382012
Heavy-ion-induced charge sharing measurement with a novel uniform vertical inverter chains (UniVIC) SEMT test structure
P Huang, S Chen, J Chen, B Liang, Y Chi
IEEE Transactions on Nuclear Science 62 (6), 3330-3338, 2015
352015
Characterization of single-event transient pulse broadening effect in 65 nm bulk inverter chains using heavy ion microbeam
Y Chi, R Song, S Shi, B Liu, L Cai, C Hu, G Guo
IEEE Transactions on Nuclear Science 64 (1), 119-124, 2016
212016
Nano-reconfigurable cells with hybrid circuits of single-electron transistors and MOSFETs
B Sui, L Fang, Y Chi, C Zhang
IEEE transactions on electron devices 57 (9), 2251-2257, 2010
212010
Characterization of the effect of pulse quenching on single-event transients in 65-nm twin-well and triple-well CMOS technologies
J Chen, J Yu, P Yu, B Liang, Y Chi
IEEE Transactions on Device and Materials Reliability 18 (1), 12-17, 2018
172018
PABAM: a physics-based analytical model to estimate bipolar amplification effect induced collected charge at circuit level
S Ruiqiang, C Shuming, D Yankang, H Pengcheng, C Jianjun, C Yaqing
IEEE Transactions on Device and Materials Reliability 15 (4), 595-603, 2015
172015
Supply voltage and temperature dependence of single-event transient in 28-nm FDSOI MOSFETs
J Xu, Y Guo, R Song, B Liang, Y Chi
Symmetry 11 (6), 793, 2019
142019
Comprehensive sensing current analysis and its guideline for the worst-case scenario of RRAM read operation
Z Tang, Y Wang, Y Chi, L Fang
Electronics 7 (10), 224, 2018
132018
Characterization of single-event transient pulse quenching among dummy gate isolated logic nodes in 65 nm twin-well and triple-well CMOS technologies
C Jianjun, C Shuming, C Yaqing, L Bin
IEEE Transactions on Nuclear Science 62 (5), 2302-2309, 2015
112015
Suppressing the hot carrier injection degradation rate in total ionizing dose effect hardened nMOSFETs
JJ Chen, SM Chen, B Liang, YB He, YQ Chi, KF Deng
Chinese Physics B 20 (11), 114220, 2011
112011
Characterization of single-event upsets induced by high-LET heavy ions in 16-nm bulk FinFET SRAMs
C Yaqing, H Pengcheng, S Qian, L Bin, Z Zhenyu
IEEE Transactions on Nuclear Science 69 (5), 1176-1181, 2021
102021
28nm fault-tolerant hardening-by-design frequency divider for reducing soft errors in clock and data recovery
H Yuan, Y Guo, J Chen, Y Chi, X Chen, B Liang
IEEE Access 7, 47955-47961, 2019
102019
Experimental characterization of the dominant multiple nodes charge collection mechanism in metal oxide-semiconductor transistors
R Song, S Chen, Y Chi, Z Wu, B Liang, J Chen, J Xu, P Hao, J Yu
Applied Physics Letters 110 (23), 2017
102017
Adsorption mechanism of SO2 on vacancy-defected graphene and Ti doped graphene: A DFT study
Z Zhang, B Liang, Y Chi, Y Jiang, J Song, Y Guo
Superlattices and Microstructures 159, 107036, 2021
92021
Bulk bias as an analog single-event transient mitigation technique with negligible penalty
J Liu, Q Sun, B Liang, J Chen, Y Chi, Y Guo
Electronics 9 (1), 27, 2019
92019
An SEU/SET-tolerant phase frequency detector with double-loop self-sampling technology for clock data recovery
Y Hengzhou, C Jianjun, L Bin, C Yaqing, C Xi, G Yang
IEEE Transactions on Nuclear Science 66 (7), 1483-1490, 2019
92019
Mechanism of single-event transient pulse quenching between dummy gate isolated logic nodes
JJ Chen, YQ Chi, B Liang
Chinese Physics B 24 (1), 016102, 2015
92015
NPN bipolar effect and its influence on charge sharing in a tripe well CMOS technology with n+ deep well
BW Liu, JJ Chen, SM Chen, YQ Chi
92012
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