| A compact model for undoped silicon-nanowire MOSFETs with Schottky-barrier source/drain G Zhu, X Zhou, TS Lee, LK Ang, GH See, S Lin, YK Chin, KL Pey IEEE transactions on electron devices 56 (5), 1100-1109, 2009 | 56 | 2009 |
| Rigorous surface-potential solution for undoped symmetric double-gate MOSFETs considering both electrons and holes at quasi nonequilibrium X Zhou, Z Zhu, SC Rustagi, GH See, G Zhu, S Lin, C Wei, GH Lim IEEE transactions on electron devices 55 (2), 616-623, 2008 | 48 | 2008 |
| Surface-potential solution for generic undoped MOSFETs with two gates WZ Shangguan, X Zhou, K Chandrasekaran, Z Zhu, SC Rustagi, ... IEEE transactions on electron devices 54 (1), 169-172, 2006 | 41 | 2006 |
| A compact model satisfying Gummel symmetry in higher order derivatives and applicable to asymmetric MOSFETs GH See, X Zhou, K Chandrasekaran, SB Chiah, Z Zhu, C Wei, S Lin, ... IEEE transactions on electron devices 55 (2), 624-631, 2008 | 37 | 2008 |
| Subcircuit compact model for dopant-segregated Schottky gate-all-around Si-nanowire MOSFETs G Zhu, X Zhou, YK Chin, KL Pey, J Zhang, GH See, S Lin, Y Yan, Z Chen IEEE transactions on electron devices 57 (4), 772-781, 2010 | 34 | 2010 |
| Method of redistribution layer formation for advanced packaging applications HW Chen, S Verhaverbeke, R Gouk, GH See, Y Gu, A Sundarrajan US Patent 10,229,827, 2019 | 31 | 2019 |
| Reconstituted substrate for radio frequency applications GH See, R Chidambaram US Patent 11,417,605, 2022 | 26 | 2022 |
| Explicit compact surface-potential and drain-current models for generic asymmetric double-gate metal–oxide–semiconductor field-effect transistors Z Zhu, X Zhou, K Chandrasekaran, SC Rustagi, GH See Japanese journal of applied physics 46 (4S), 2067, 2007 | 23 | 2007 |
| Integrated circuits with contacts through a buried oxide layer and methods of producing the same RT Toh, GH See, S Zhang, PR Verma US Patent 9,472,512, 2016 | 22 | 2016 |
| Unification of MOS compact models with the unified regional modeling approach X Zhou, G Zhu, GH See, K Chandrasekaran, SB Chiah, KY Lim Journal of computational electronics 10, 121-135, 2011 | 22 | 2011 |
| “Ground-Referenced” Model for Three-Terminal Symmetric Double-Gate MOSFETs With Source/Drain Symmetry G Zhu, GH See, S Lin, X Zhou IEEE transactions on electron devices 55 (9), 2526-2530, 2008 | 21 | 2008 |
| A rigorous surface-potential-based IV model for undoped cylindrical nanowire MOSFETs SH Lin, X Zhou, GH See, ZM Zhu, GH Lim, CQ Wei, GJ Zhu, ZH Yao, ... 2007 7th IEEE Conference on Nanotechnology (IEEE NANO), 889-892, 2007 | 21 | 2007 |
| Physics-based single-piece charge model for strained-Si MOSFETs K Chandrasekaran, X Zhou, SB Chiah, W Shangguan, GH See IEEE transactions on electron devices 52 (7), 1555-1562, 2005 | 21 | 2005 |
| Effect of substrate doping on the capacitance-voltage characteristics of strained-silicon pMOSFETs K Chandrasekaran, X Zhou, SB Chiah, W Shangguan, GH See, LK Bera, ... IEEE electron device letters 27 (1), 62-64, 2005 | 19 | 2005 |
| Compact modeling of doped symmetric DG MOSFETs with regional approach K Chandrasekaran, ZM Zhu, X Zhou, W Shangguan, GH See, SB Chiah, ... Workshop on Compact Modeling, NSTI-Nanotech, MA, USA, 792-795, 2006 | 18 | 2006 |
| Fine-pitch RDL integration for fan-out wafer-level packaging P Lianto, CW Tan, QJ Peng, AH Jumat, X Dai, KMP Fung, GH See, ... 2020 IEEE 70th Electronic Components and Technology Conference (ECTC), 1126-1131, 2020 | 17 | 2020 |
| Single-piece polycrystalline silicon accumulation/depletion/inversion model with implicit/explicit surface-potential solutions SB Chiah, X Zhou, K Chandrasekaran, WZ Shangguan, GH See, ... Applied Physics Letters 86 (20), 2005 | 15 | 2005 |
| Unified regional charge-based versus surface-potential-based compact modeling approaches X Zhou, SB Chiah, K Chandrasekaran, GH See, W Shangguan, ... Proc. NSTI Nanotech 2005, 25-30, 2005 | 15 | 2005 |
| Compact gate-current model based on transfer-matrix method WZ Shangguan, X Zhou, SB Chiah, GH See, K Chandrasekaran Journal of applied physics 97 (12), 2005 | 12 | 2005 |
| A compact model for undoped symmetric double-gate MOSFETs with Schottky-barrier source/drain GJ Zhu, X Zhou, TS Lee, LK Ang, GH See, SH Lin ESSDERC 2008-38th European Solid-State Device Research Conference, 182-185, 2008 | 11 | 2008 |
