| A Delta-Readout Scheme for Low-Power CMOS Image Sensors With Multi-Column-Parallel SAR ADCs HJ Kim, SI Hwang, JW Kwon, DH Jin, BS Choi, SG Lee, JH Park, JK Shin, ... IEEE Journal of Solid-State Circuits 51 (10), 2262 - 2273, 2016 | 62 | 2016 |
| Semiconductor device S Maeda, SC Park, CH Park, Y Harada, SM Kang, JW Kwon, H Kim, ... US Patent 10,840,244, 2020 | 12 | 2020 |
| A Low-Power TDC-Configured Logarithmic Resistance Sensor for MLC PCM Readout JW Kwon, DH Jin, HJ Kim, SI Hwang, MC Shin, JH Cheon, ST Ryu IEEE SENSORS JOURNAL 16 (14), 5524-5535, 2016 | 10 | 2016 |
| Integrated circuits and semiconductor device including standard cell J Jeong, K Jiwook, S Kim, H Kim US Patent 10,943,923, 2021 | 9 | 2021 |
| A 15 µm-Pitch, 8.7-ENOB, 13-Mcells/sec Logarithmic Readout Circuit for Multi-Level Cell Phase Change Memory DH Jin, JW Kwon, HJ Kim, SI Hwang, M Shin, J Cheon, ST Ryu IEEE JOURNAL OF SOLID-STATE CIRCUITS 50 (10), 2015 | 9 | 2015 |
| Delta readout scheme for image-dependent power savings in a CMOS image sensor with multi-column-parallel SAR ADCs HJ Kim, SI Hwang, JW Kwon, DH Jin, BS Choi, SG Lee, JH Park, JK Shin, ... 2015 IEEE Asian Solid-State Circuits Conference (A-SSCC), 1-4, 2015 | 8 | 2015 |
| A Two-step 5b Logarithmic ADC with Minimum Step-size of 0.1% Full-scale for MLC Phase-Change Memory Readout JW Kwon, DH Jin, HJ Kim, SI Hwang, MC Shin, JH Kang, ST Ryu IEEE Custom Integrated Circuits Conference, 2014 | 8 | 2014 |
| Semiconductor device T Kim, J Jeong, K Jiwook, R Azmat, K Chun US Patent 11,348,918, 2022 | 6 | 2022 |
| A reference-free temperature-dependency-compensating readout scheme for phase-change memory using flash-ADC-configured sense amplifiers DH Jin, JW Kwon, MJ Seo, MY Kim, MC Shin, SJ Kang, JH Yoon, TS Kim, ... IEEE Journal of Solid-State Circuits 54 (6), 1812-1823, 2019 | 4 | 2019 |
| Multi-level memory apparatus and data sensing method thereof CH Park, ST Ryu, JW Kwon, DH Jin US Patent 9,159,411, 2015 | 4 | 2015 |
| An Inherently dB-linear All-CMOS Variable Gain Amplifier J Kwon, ST Ryu JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE 11 (4), 336-343, 2011 | 3 | 2011 |
| Multi-level memory apparatus and data sensing method thereof ST Ryu, JW Kwon, DH Jin US Patent 9,318,195, 2016 | 2 | 2016 |
| Semiconductor device BJ Kang, PJ Park, JW Kwon, CH Park, JS Yang US Patent App. 18/304,560, 2023 | 1 | 2023 |
| Semiconductor device K Byungju, R Azmat, K Jiwook, S Kim, K Chun US Patent App. 17/751,093, 2023 | 1 | 2023 |
| An M-metric Readout Circuit for MLC Phase Change Memory With a Comparator-Based Push-Pull Bit-Line Driver JW Kwon, DH Jin, MJ Seo, ST Ryu IEEE Transactions on Circuits and Systems II: Express Briefs, 2024 | | 2024 |
| Expanding Design Technology Co-Optimization Potentials with Back-Side Interconnect Innovation BS Kim, S Choi, JH Lee, K Lee, J Park, J Kwon, S Park, K Chun, H Simka, ... 2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2024 | | 2024 |
| Semiconductor device SIM Jeonggu, K Jiwook, J Jeong US Patent App. 18/205,139, 2024 | | 2024 |
| Semiconductor devices S Choi, K Jiwook, K Byungju, CH Park, K Chun US Patent App. 18/113,133, 2023 | | 2023 |
| Semiconductor device P Panjae, S Choi, K Jiwook, CH Park US Patent App. 18/156,494, 2023 | | 2023 |
| Semiconductor device T Kim, J Jeong, K Jiwook, R Azmat, K Chun US Patent 11,688,740, 2023 | | 2023 |
Seung-Tak RyuKAIST, Korea在 kaist.ac.kr 的电子邮件经过验证
