| 45nm low power CMOS logic compatible embedded STT MRAM utilizing a reverse-connection 1T/1MTJ cell CJ Lin, SH Kang, YJ Wang, K Lee, X Zhu, WC Chen, X Li, WN Hsu, ... 2009 IEEE International Electron Devices Meeting (IEDM), 1-4, 2009 | 419 | 2009 |
| MTJ structure and integration scheme X Li, SH Kang, MM Nowak US Patent 8,866,242, 2014 | 134 | 2014 |
| A 45nm 1Mb embedded STT-MRAM with design techniques to minimize read-disturbance JP Kim, T Kim, W Hao, HM Rao, K Lee, X Zhu, X Li, W Hsu, SH Kang, ... 2011 Symposium on VLSI Circuits-Digest of Technical Papers, 296-297, 2011 | 105 | 2011 |
| Method of forming a magnetic tunnel junction structure X Li, SH Kang, X Zhu US Patent 9,136,463, 2015 | 98 | 2015 |
| Strain induced reduction of switching current in spin-transfer torque switching devices X Zhu, X Li, WC Chen, SH Kang US Patent 8,704,320, 2014 | 88 | 2014 |
| Multiple (multi-) level cell (MLC) non-volatile (NV) memory (NVM) matrix circuits for performing matrix computations with multi-bit input vectors X Li, SH Kang, WC Chen US Patent 10,460,817, 2019 | 76 | 2019 |
| Magnetic tunnel junction cell including multiple vertical magnetic domains X Li, SH Kang, X Zhu US Patent 7,885,105, 2011 | 74 | 2011 |
| Field-based capacitance modeling for sub-65-nm on-chip interconnect W Zhao, X Li, S Gu, SH Kang, MM Nowak, Y Cao IEEE transactions on electron devices 56 (9), 1862-1872, 2009 | 74 | 2009 |
| Magnetic tunnel junction device and fabrication X Li, SH Kang, X Zhu US Patent 8,912,012, 2014 | 73 | 2014 |
| MRAM integration techniques for technology scaling X Li, Y Lu, SH Kang US Patent 9,406,875, 2016 | 72 | 2016 |
| Fully functional perpendicular STT-MRAM macro embedded in 40 nm logic for energy-efficient IOT applications Y Lu, T Zhong, W Hsu, S Kim, X Lu, JJ Kan, C Park, WC Chen, X Li, X Zhu, ... 2015 IEEE International Electron Devices Meeting (IEDM), 26.1. 1-26.1. 4, 2015 | 71 | 2015 |
| Magnetic storage element utilizing improved pinned layer stack WC Chen, SH Kang, X Zhu, X Li US Patent 8,564,080, 2013 | 63 | 2013 |
| MRAM device and integration techniques compatible with logic integration X Li, X Zhu, SH Kang US Patent 8,674,465, 2014 | 62 | 2014 |
| Magnetic tunnel junction device and fabrication K Lee, X Zhu, X Li, SH Kang US Patent 8,120,126, 2012 | 60 | 2012 |
| Magnetic tunnel junction device and fabrication X Li, SH Kang, X Zhu US Patent 8,455,267, 2013 | 51 | 2013 |
| Perpendicular magnetic tunnel junction structure X Li US Patent 9,385,308, 2016 | 48 | 2016 |
| Magnetic tunnel junction device with separate read and write paths X Zhu, S Gu, X Li, SH Kang US Patent 8,004,881, 2011 | 48 | 2011 |
| Two mask MTJ integration for STT MRAM SH Kang, X Li, S Gu, M Nowak US Patent 8,125,040, 2012 | 47 | 2012 |
| STT MRAM magnetic tunnel junction architecture and integration SH Kang, X Li, S Gu, K Lee, X Zhu US Patent 8,564,079, 2013 | 46 | 2013 |
| Methods of integrated shielding into MTJ device for MRAM WC Chen, X Li, SH Kang US Patent 8,557,610, 2013 | 45 | 2013 |
