| A family of low-power truly modular programmable dividers in standard 0.35-/spl mu/m CMOS technology CS Vaucher, I Ferencic, M Locher, S Sedvallson, U Voegeli, Z Wang IEEE Journal of Solid-State Circuits 35 (7), 1039-1045, 2000 | 493 | 2000 |
| A 60 GHz phase shifter integrated with LNA and PA in 65 nm CMOS for phased array systems Y Yu, PGM Baltus, A de Graauw, E Van der Heijden, CS Vaucher, ... IEEE Journal of Solid-State Circuits 45 (9), 1697-1709, 2010 | 191 | 2010 |
| Circuit design for RF transceivers D Leenaerts, J Van der Tang, CS Vaucher Springer Science & Business Media, 2007 | 181 | 2007 |
| An adaptive PLL tuning system architecture combining high spectral purity and fast settling time CS Vaucher IEEE Journal of solid-state circuits 35 (4), 490-502, 2000 | 167 | 2000 |
| Architectures for RF frequency synthesizers CS Vaucher Springer Science & Business Media, 2006 | 162 | 2006 |
| A wide-band tuning system for fully integrated satellite receivers C Vaucher, D Kasperkovitz IEEE Journal of Solid-State Circuits 33 (7), 987-997, 1998 | 99 | 1998 |
| Low-jitter clock multiplication: A comparison between PLLs and DLLs RCH van de Beek, EAM Klumperink, CS Vaucher, B Nauta IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 2002 | 93 | 2002 |
| A 21.7-to-27.8 GHz 2.6-degrees-rms 40mW frequency synthesizer in 45nm CMOS for mm-wave communication applications JF Osorio, CS Vaucher, B Huff, E vd Heijden, A de Graauw 2011 IEEE International Solid-State Circuits Conference, 278-280, 2011 | 56 | 2011 |
| A 2.5-10-GHz clock multiplier unit with 0.22-ps RMS jitter in standard 0.18-/spl mu/m CMOS RCH van de Beek, CS Vaucher, DMW Leenaerts, EAM Klumperink, ... IEEE journal of solid-state circuits 39 (11), 1862-1872, 2004 | 49 | 2004 |
| A 15-mW fully integrated I/Q synthesizer for Bluetooth in 0.18-μm CMOS DMW Leenaerts, CS Vaucher, HJ Bergveld, M Thompson, K Moore IEEE Journal of Solid-State Circuits 38 (7), 1155-1162, 2003 | 40 | 2003 |
| A 60GHz digitally controlled RF-beamforming receiver front-end in 65nm CMOS Y Yu, P Baltus, A van Roermund, A de Graauw, E van der Heijden, ... 2009 IEEE Radio Frequency Integrated Circuits Symposium, 211-214, 2009 | 38 | 2009 |
| Phase locked loop RCH Van De Beek, EAM Klumperink, B Nauta, CS Vaucher US Patent 7,218,157, 2007 | 34 | 2007 |
| Data clocked recovery circuit CS Vaucher US Patent 7,027,544, 2006 | 25 | 2006 |
| A low-power 20 GHz static frequency divider with programmable input sensitivity CS Vaucher, M Apostolidou 2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of …, 2002 | 25 | 2002 |
| Silicon-germanium ICs for satellite microwave front-ends CS Vaucher, O Apeldoorn, M Apostolidou, J Dekkers, A Farrugia, H Gul, ... Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting, 2005 …, 2005 | 24 | 2005 |
| Receiver tuning system WG Kasperkovitz, CS Vaucher US Patent 6,751,445, 2004 | 24 | 2004 |
| A 2.5-10-GHz Clock Multiplier Unit With 0.22-ps RMS Jitter in Standard 0.18-mm CMOS RCH Beek, CS Vaucher, DMW Leenaerts, EAM Klumperink, B Nauta IEEE Journal of Solid State Circuits 39 (11), 1862-1872, 2004 | 22 | 2004 |
| A 2.5 to 10GHz clock multiplier unit with 0.22 ps RMS jitter in a 0.18/spl mu/m CMOS technology RCH Van De Beek, CS Vaucher, DMW Leenaerts, N Pavlovic, K Mistry, ... 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of …, 2003 | 21 | 2003 |
| Functional safety monitor pin C Gehrels, CS Vaucher, L Van Dijk US Patent 9,442,184, 2016 | 19 | 2016 |
| Colpitts VCOs for low-phase noise and low-power applications with transformer-coupled tank E Van Der Heijden, A Farrugia, R Breunisse, CS Vaucher, R Pijper 2008 IEEE Radio Frequency Integrated Circuits Symposium, 653-656, 2008 | 19 | 2008 |
Bram NautaProfessor Electrical Engineering, University of twente在 utwente.nl 的电子邮件经过验证
