| FinFET-based SRAM design Z Guo, S Balasubramanian, R Zlatanovici, TJ King, B Nikolić Proceedings of the 2005 international symposium on Low power electronics and …, 2005 | 224 | 2005 |
| FinFET process refinements for improved mobility and gate work function engineering YK Choi, L Chang, P Ranade, JS Lee, D Ha, S Balasubramanian, ... Digest. International Electron Devices Meeting,, 259-262, 2002 | 192 | 2002 |
| SRAM read/write margin enhancements using FinFETs A Carlson, Z Guo, S Balasubramanian, R Zlatanovici, TJK Liu, B Nikolic IEEE transactions on very large scale integration (VLSI) systems 18 (6), 887-900, 2009 | 89 | 2009 |
| Hydrogen annealing effect on DC and low-frequency noise characteristics in CMOS FinFETs JS Lee, YK Choi, D Ha, S Balasubramanian, TJ King, J Bokor IEEE Electron Device Letters 24 (3), 186-188, 2003 | 88 | 2003 |
| FinFET SRAM with enhanced read/write margins A Carlson, Z Guo, S Balasubramanian, TK Liu, B Nikolic 2006 IEEE international SOI Conferencee Proceedings, 105-106, 2006 | 60 | 2006 |
| MOSFET design for forward body biasing scheme A Hokazono, S Balasubramanian, K Ishimaru, H Ishiuchi, TJK Liu, C Hu IEEE Electron Device Letters 27 (5), 387-389, 2006 | 55 | 2006 |
| Forward body biasing as a bulk-Si CMOS technology scaling strategy A Hokazono, S Balasubramanian, K Ishimaru, H Ishiuchi, C Hu, TJK Liu IEEE Transactions on Electron Devices 55 (10), 2657-2664, 2008 | 45 | 2008 |
| MOSFET hot-carrier reliability improvement by forward-body bias A Hokazono, S Balasubramanian, K Ishimaru, H Ishiuchi, C Hu, TJK Liu IEEE Electron Device Letters 27 (7), 605-608, 2006 | 38 | 2006 |
| FinFET SRAM design challenges D Burnett, S Parihar, H Ramamurthy, S Balasubramanian 2014 IEEE International Conference on IC Design & Technology, 1-4, 2014 | 29 | 2014 |
| MOS structures that exhibit lower contact resistance and methods for fabricating the same S Balasubramanian US Patent 7,981,749, 2011 | 28 | 2011 |
| Finfet-based sram with feedback Z Guo, S Balasubramanian, R Zlatanovici, TJ King, B Nikolic US Patent App. 11/622,305, 2007 | 28 | 2007 |
| Circuit-performance implications for double-gate MOSFET scaling below 25 nm S Balasubramanian, L Chang, B Nikolic, TJ King Proc. Silicon Nanoelectronics Workshop, 16-17, 2003 | 28 | 2003 |
| Selective enhancement of SiO2 etch rate by Ar-ion implantation for improved etch depth control X Sun, Q Lu, H Takeuchi, S Balasubramanian, TJK Liu Electrochemical and Solid-State Letters 10 (9), D89, 2007 | 22 | 2007 |
| Low-variation SRAM bitcells in 22nm FDSOI technology V Joshi, H Ramamurthy, S Balasubramanian, S Seo, H Yoon, X Zou, ... 2017 Symposium on VLSI Technology, T222-T223, 2017 | 15 | 2017 |
| Threshold voltage and DIBL variability modeling based on forward and reverse measurements for SRAM and analog MOSFETs N Damrongplasit, L Zamudio, TJK Liu, S Balasubramanian IEEE Transactions on Electron Devices 62 (4), 1119-1126, 2015 | 13 | 2015 |
| Compact modeling of FinFETs featuring independent-gate operation mode CH Lin, M Dunga, S Balasubramanian, AM Niknejad, C Hu, X Xi, J He, ... IEEE VLSI-TSA International Symposium on VLSI Technology, 2005.(VLSI-TSA …, 2005 | 12 | 2005 |
| Nanoscale thin-body MOSFET design and applications S Balasubramanian University of California, Berkeley, 2006 | 10 | 2006 |
| Near-threshold circuit variability in 14nm FinFETs for ultra-low power applications S Balasubramanian, N Pimparkar, M Kushare, V Mahajan, J Bansal, ... 2016 17th International Symposium on Quality Electronic Design (ISQED), 258-262, 2016 | 9 | 2016 |
| Fin sidewall microroughness measurement by AFM CFH Gondran, E Morales, A Guerry, W Xiong, CR Cleavelin, R Wise, ... MRS Online Proceedings Library (OPL) 811, E1. 13, 2004 | 9 | 2004 |
| Critical current (ICRIT) based SPICE model extraction for SRAM cell Q Chen, S Balasubramanian, C Thuruthiyil, M Gupta, V Wason, N Subba, ... 2008 9th International Conference on Solid-State and Integrated-Circuit …, 2008 | 8 | 2008 |
Tsu-Jae King LiuUniversity of California在 eecs.berkeley.edu 的电子邮件经过验证
