| Template-based parasitic-aware optimization and retargeting of analog and RF integrated circuit layouts N Jangkrajarng, L Zhang, S Bhattacharya, N Kohagen, CJR Shi Computer-Aided Design, 2006. ICCAD'06. IEEE/ACM International Conference on …, 2006 | 128 | 2006 |
| Active device generation for automatic analog layout retargeting tool R Hartono, N Jangkrajarng, S Bhattacharya, CJR Shi University of Washington Electrical Engineering Technical Report UWEETR-2004 15, 2004 | 105 | 2004 |
| IPRAIL—Intellectual property reuse-based analog IC layout automation N Jangkrajarng, S Bhattacharya, R Hartono, CJR Shi Integration, the VLSI Journal 36 (4), 237-262, 2003 | 71 | 2003 |
| Parasitic-aware optimization and retargeting of analog layouts: A symbolic-template approach L Zhang, N Jangkrajarng, S Bhattacharya, CJR Shi IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008 | 55 | 2008 |
| Multilevel symmetry-constraint generation for retargeting large analog layouts S Bhattacharya, N Jangkrajarng, CJR Shi Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions …, 2006 | 45 | 2006 |
| Correct-by-construction layout-centric retargeting of large analog designs S Bhattacharya, N Jangkrajarng, R Hartono, CJR Shi Proceedings of the 41st annual Design Automation Conference, 139-144, 2004 | 35 | 2004 |
| Hierarchical extraction and verification of symmetry constraints for analog layout automation S Bhattacharya, N Jangkrajarng, R Hartono, CJ Shi Proceedings of the 2004 Asia and South Pacific Design Automation Conference …, 2004 | 28 | 2004 |
| Legalizing a portion of a circuit layout SH Batterywala, S Bhattacharya, S Rajagopalan, HKT Ma US Patent 9,043,741, 2015 | 18 | 2015 |
| Legalizing a Multi-patterning Integrated Circuit Layout S Bhattacharya, S Rajagopalan, SH Batterywala US Patent 20,150,095,865, 2015 | 17 | 2015 |
| Automatic analog layout retargeting for new processes and device sizes N Jangkrajarng, S Bhattacharya, R Hartono, CJR Shi Circuits and Systems, 2003. ISCAS'03. Proceedings of the 2003 International …, 2003 | 15 | 2003 |
| Template-driven parasitic-aware optimization of analog integrated circuit layouts S Bhattacharya, N Jangkrajarng, CJ Shi Proceedings of the 42nd annual Design Automation Conference, 644-647, 2005 | 14 | 2005 |
| Multiple specifications radio-frequency integrated circuit design with automatic template-driven layout retargeting N Jangkrajarng, S Bhattacharya, R Hartono, CJR Shi Design Automation Conference, 2004. Proceedings of the ASP-DAC 2004. Asia …, 2004 | 14 | 2004 |
| Cell swapping based migration methodology for analog and custom layouts SH Batterywala, S Bhattacharya, S Rajagopalan, HKT Ma, NV Shenoy Quality Electronic Design, 2008. ISQED 2008. 9th International Symposium on …, 2008 | 12 | 2008 |
| Automatic layout modification tool with non-uniform grids ND Salodkar, S Rajagopalan, S Bhattacharya, SH Batterywala US Patent 9,898,567, 2018 | 10 | 2018 |
| Automatic device layout generation for analog layout retargeting R Hartono, N Jangkrajarng, S Bhattacharya, CJR Shi VLSI Design, 2005. 18th International Conference on, 457-462, 2005 | 7 | 2005 |
| Concurrent logic and interconnect delay estimation of MOS circuits by mixed algebraic and boolean symbolic analysis S Bhattacharya, CJR Shi Circuits and Systems, 2003. ISCAS'03. Proceedings of the 2003 International …, 2003 | 4 | 2003 |
| On efficient and robust constraint generation for practical layout legalization S Bhattacharya, SH Batterywala, S Rajagopalan, HKT Ma, NV Shenoy Quality Electronic Design, 2008. ISQED 2008. 9th International Symposium on …, 2008 | 3 | 2008 |
| CrtSmile: a CAD tool for CMOS RF transistor substrate modeling incorporating layout effects Z Li, R Suravarapu, R Hartono, S Bhattacharya, K Mayaram, R Shi Proceedings of the 2004 Asia and South Pacific Design Automation Conference …, 2004 | 3 | 2004 |
| Fixing Double Patterning violations with look-ahead. S Bhattacharya, S Rajagopalan, SH Batterywala ASP-DAC, 149-154, 2014 | 2 | 2014 |
| Automatic design rule correction in presence of multiple grids and track patterns N Salodkar, S Rajagopalan, S Bhattacharya, S Batterywala Proceedings of the 50th Annual Design Automation Conference, 26, 2013 | 1 | 2013 |
C-J Richard Shi在 uw.edu 的电子邮件经过验证
C-J Richard Shi在 uw.edu 的电子邮件经过验证