| Impact of self-heating effect on the performance of hybrid FinFET RP Nelapati, K Sivasankaran Microelectronics journal 76, 63-68, 2018 | 22 | 2018 |
| Design and investigation of InAs source dual metal stacked gate-oxide heterostructure tunnel FET based label-free biosensor R Ghosh, RP Nelapati Micro and Nanostructures 174, 207444, 2023 | 13 | 2023 |
| Impact of Device Geometrical Parameter Variation on RF Stability of SELBOX Inverted-T Junctionless FINFET RPNKS Veerati Raju Silicon, 2020 | 7* | 2020 |
| Impact of Deep Cryogenic Temperatures on High-k Stacked Dual Gate Junctionless MOSFET Performance: Analog and RF analysis R Ghosh, RP Nelapati Silicon 16 (2), 615-623, 2024 | 5 | 2024 |
| Process variation study of SELBOX inverted-T junctionless FINFET for high-performance applications RP Nelapati, S K Silicon 12 (7), 1699-1706, 2020 | 5 | 2020 |
| Design of quantum cost efficient reversible multiplier using Reed-Muller expressions NR Pankaj, P Venugopal, P Mortha International Journal of Computing Science and Mathematics 7 (3), 221-228, 2016 | 3 | 2016 |
| Sensitivity analysis of bi-metal stacked-gate-oxide hetero-juncture tunnel fet with Si0.6Ge0.4 source biosensor considering non-ideal factors R Ghosh, RP Nelapati, P Saha, R Chinthaginjala, T Kim Plos one 19 (6), e0301479, 2024 | | 2024 |
| Low-power and area-efficient memristor based non-volatile D latch and flip-flop: Design and analysis RP Nelapati Plos one 19 (3), e0300073, 2024 | | 2024 |
| Design and Performance Analysis of SELBOX Junctionless FinFET RP Nelapati, K Sivasankaran Informacije MIDEM 49 (1), 25-32, 2019 | | 2019 |
| Study of Process Parameters Variation and Self Heating Effect on Inverted T Field Effect Transistors RP Nelapati Vellore, 2019 | | 2019 |
| ASIC flow implementation over multi clock processor block on 32 nm Node NP Pathrabe, RP Nelapati 2017 International conference on Microelectronic Devices, Circuits and …, 2017 | | 2017 |
